Time filter

Source Type


Uchiyama S.,Japan National Institute of Advanced Industrial Science and Technology | Uchiyama S.,Tokyo University of Science | Yang Z.Q.,Japan National Institute of Advanced Industrial Science and Technology | Toda A.,Meltex Inc. | And 5 more authors.
Journal of Micromechanics and Microengineering | Year: 2013

Solenoid configuration of micro inductor, which has advantages of high quality factor and low loss, is needed in micro energy and power electronics applications but it is difficult to prepare using conventional microfabrication processes. In this work, we present a new microelectromechanical systems-based technology of micro solenoid-type inductor by a newly developed cylindrical projection photolithography method. Direct electroplating process of copper film on coil patterns was also successfully developed for achieving thick windings so that thick photoresist-based electroplating molds are not needed. Micro solenoid-type inductor prototypes of the winding pitch of about 40 μm, the winding number of 20 and 50, and the winding thickness of about 14 μm, were successfully fabricated on a 1 mm diameter glass capillary. The prepared 20-turn and 50-turn micro inductors were of inductance of 69 and 205 nH at 30 MHz, respectively. © 2013 IOP Publishing Ltd.

Kawashima S.,Meltex Inc.
Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT | Year: 2011

Electronic equipment has changed to have higher performance with minimized in size. This trend required to electronic devices minimization also. Numerous packaging techniques have developed using metal flame, PWB material and plastic tape to mount semiconductor devices on PWB 1). To achieve further high mounting density, the semiconductor device directly solder mounted on package after forming metal bumps on electrode of semiconductor devices. Aluminum alloy is common material for electrode of semiconductor devices, since it has relatively high conductivity, chemically stable and less reaction in semiconductor manufacturing process. However, it needs other meal layer for soldering to form bump on it. Sputtered Ti/Cu layer and electrolytic solder plating is widely used to form solder bump. However, this process requires longer and costly process such as multiple vacuum process, photo image process, etc. © 2011 IEEE.

Zhu Q.S.,NMEMS Technology Research Organization | Zhu Q.S.,Japan National Institute of Advanced Industrial Science and Technology | Toda A.,Meltex Inc. | Zhang Y.,NMEMS Technology Research Organization | And 5 more authors.
Journal of the Electrochemical Society | Year: 2014

In this work, the Cu electrodeposition was carried out for the filling of through silicon via (TSV) using an additive-free Cu electrolyte and periodic pulse reverse (PPR) current. It was attempted to understand the filling mechanism by PPR plating and then to explore a potential solution for void-free filling in easy electrolytes. The filling results showed that the void size was continually reduced as decreasing current density. A void-free filling was obtained at low current density. During the Cu growth process, a "V" shape filling structure occurred at the upper of the via and the ratio of this structure increased with the decrease of current density. The electrochemical analyzes results demonstrated that at low current density, the potential during forward deposition was more uniform along the depth, and during reverse pulse the potential difference between the shallow and deep location was larger than that at high current density. This result implied that at low current density the reverse pulse played a strong suppression effect that contributed to the "V" shape growth. A competitive growth model between the bottom reversed "V" structure and the upper "V" structure was proposed to explain the void-free filling mechanism in PPR plating process. © 2014 The Electrochemical Society. All rights reserved.

Yamaoka K.,Geological Survey of Japan | Hong E.,University of Tokyo | Hong E.,Meltex Inc. | Ishikawa T.,Japan Agency for Marine - Earth Science and Technology | And 2 more authors.
Chemical Geology | Year: 2015

Boron concentrations and isotopic compositions were determined for vent fluids from 11 sites in arc/back-arc seafloor hydrothermal systems. This new dataset allowed a systematic comparison of boron behavior during water-rock interaction in different geological settings. In sediment-starved hydrothermal systems (e.g., Manus Basin, Izu-Bonin Arc, Mariana Trough), end-member fluids showed large variations in boron concentration (0.53-1.52mmol/kg) and δ11B value (13.5-29.7‰), reflecting the interaction of seawater with varied types of rock that occur in arc/back-arc settings. Based on the model calculations, the boron concentration and δ11B value of the fluid are better explained by an equilibration between seawater and rock than a mixing model. The Chlorine-depleted fluids from phase-separated hydrothermal systems (e.g., North Fiji Basin) had low boron concentrations (0.44-0.55mmol/kg) and high δ11B values (34.5-36.1‰). The small fractionations of boron and boron isotopes during phase separation suggest that these characteristics were acquired during water-rock interaction rather than phase separation and segregation processes. The fluids from sediment-hosted hydrothermal systems (e.g., Okinawa Trough) are characterized by high boron concentrations (3.9-4.8mmol/kg) and low δ11B values (2.5-2.9‰). These fluids also showed high Cs/B ratios, indicating interactions with terrigenous sediments. Model calculations demonstrate that the combined evaluation of δ11B values and Cs/B ratios are useful for a quantitative estimate of sedimentary contributions in seafloor hydrothermal systems. © 2014 Elsevier B.V.

Zhang Y.,Japan National Institute of Advanced Industrial Science and Technology | Toda A.,Meltex Inc. | Okada H.,Japan National Institute of Advanced Industrial Science and Technology | Kobayashi T.,Japan National Institute of Advanced Industrial Science and Technology | And 2 more authors.
Proceedings of the IEEE International Conference on Micro Electro Mechanical Systems (MEMS) | Year: 2012

This paper presents a new wafer-scale micromachining technology of three-dimensional (3D) cantilever array for sensor application. The 3D cantilever consists of a vertically Si/metal laminated structure and works in the in-the-plane mode so that it has the advantage of easy-to-package, non-stiction and compact. Prototype of 5-pair 3D cantilever array was successfully fabricated in 4-inch wafer scale. However, its fabrication is involved of micromachining technology of metal film on high aspect ratio structures. 4-inch wafer-scale wet-etching technology of electroless-plated Ni-8%P alloy film (∼1.5 μm-thick) was for the first time successfully established on a high topographic surface with the minimum feature size of about 20 μm. © 2012 IEEE.

Discover hidden collaborations