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Carlsbad, CA, United States

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Streshinsky M.,National University of Singapore | Ayazi A.,Luxtera Inc. | Xuan Z.,University of Delaware | Lim A.E.-J.,Institute of Microelectronics, Singapore | And 5 more authors.
Optics Express | Year: 2013

We present measurements of the nonlinear distortions of a traveling-wave silicon Mach-Zehnder modulator based on the carrier depletion effect. Spurious free dynamic range for second harmonic distortion of 82 dB·Hz 1/2 is seen, and 97 dB·Hz2/3 is measured for intermodulation distortion. This measurement represents an improvement of 20 dB over the previous best result in silicon. We also show that the linearity of a silicon traveling wave Mach-Zehnder modulator can be improved by differentially driving it. These results suggest silicon may be a suitable platform for analog optical applications. © 2013 Optical Society of America.


De Dobbelaere P.,Luxtera Inc.
2015 4th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2015 - Proceedings | Year: 2015

Increasing data interconnect densities and rates drive the requirements for optical high-speed interfaces to ASICs (e.g. network switches, routers, CPU's). In contemporary implementations, as illustrated in Figure 1a, optical transceivers (such as SFP and QSFP modules and AOCs) are located at the card edge. In such an architecture increasing data rates aggravate electrical signal integrity issues due to reflections at optical connectors and losses (dielectric and skin-effect) in the relatively long traces on the card PCBA connecting the electrical pads of the switch chip with the fingers of the transceiver module. To overcome those challenges, advanced (power hungry) electrical I/Os (re-timers, equalizers,) on the ASIC and the optical transceivers are required. Also advanced (costly) PCB materials may be needed. An approach to reduce those signal integrity problems is to reduce the distance between the optical transceivers and the ASIC by moving the transceivers from the board edge to the inside of the shelf as illustrated in Figure 1b. Here the optical signals are routed to the front panel by means of optical fibers. As an additional benefit, embedding the transceivers in the card may increase the achievable density at the card edge. However, it also adds more stringent reliability and thermal management requirements for the optical transceivers. An example is the IBM Power 775 System where transceivers are located around a HUB ASIC [1]. The most ideal solution has the ASIC and the optical transceivers integrated or co-packaged as shown in Figure.2c. This approach virtually eliminates the signal integrity challenges and enables the highest interconnect density. © 2015 IEEE.


Zheng X.,Oracle Inc. | Shubin I.,Oracle Inc. | Li G.,Oracle Inc. | Pinguet T.,Luxtera Inc. | And 8 more authors.
Optics Express | Year: 2010

We report the first compact silicon CMOS 1×4 tunable multiplexer/ demultiplexer using cascaded silicon photonic ring-resonator based add/drop filters with a radius of 12μm, and integrated doped-resistor thermal tuners. We measured an insertion loss of less than 1dB, a channel isolation of better than 16dB for a channel spacing of 200GHz, and a uniform 3dB pass band larger than 0.4nm across all four channels. We demonstrated accurate channel alignment to WDM ITU grid wavelengths using integrated silicon heaters with a tuning efficiency of 90pm/mW. Using this device in a 10Gbps data link, we observed a low power penalty of 0.6dB. © 2010 Optical Society of America.


Zheng X.,Oracle Inc. | Lexau J.,Sun Laboratories | Luo Y.,Oracle Inc. | Thacker H.,Oracle Inc. | And 10 more authors.
Optics Express | Year: 2010

We report the first sub-picojoule per bit (400fJ/bit) operation of a silicon modulator intimately integrated with a driver circuit and embedded in a clocked digital transmitter. We show a wall-plug power efficiency below 400μW/Gbps for a 130nm SOI CMOS carrier-depletion ring modulator flip-chip integrated to a 90nm bulk Si CMOS driver circuit. We also demonstrate stable error-free transmission of over 1.5 petabits of data at 5Gbps over 3.5 days using the integrated modulator without closed-loop ring resonance tuning. Small signal measurements of the CMOS ring modulator, sans circuit, showed a 3dB bandwidth in excess of 15GHz at 1V of reverse bias, indicating that further increases in transmission rate and reductions of energy-per-bit is possible while retaining compatibility with CMOS drive voltages. © 2010 Optical Society of America.


De Dobbelaere P.,Luxtera Inc.
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | Year: 2013

A Si Photonics technology platform based on a commercial SOI CMOS node has been developed for manufacturing advanced optical transceivers. Integration methodologies, design, manufacturing, performance and roadmap of silicon photonics based transceiver ICs and interconnect systems are addressed. © 2013 IEEE.


Li G.,Oracle Inc. | Yao J.,Oracle Inc. | Luo Y.,Oracle Inc. | Thacker H.,Oracle Inc. | And 7 more authors.
Optics Express | Year: 2012

We report optical waveguides up to one meter long with 0.026 dB/cm loss fabricated in a 300nm thick SOI CMOS process. Combined with tight bends and compact interlayer grating couplers, we demonstrate a complete toolbox for ultralow-loss, high-density waveguide routing for macrochip interconnects. © 2012 Optical Society of America.


Trademark
Luxtera Inc. | Date: 2013-12-20

Semiconductors which integrate photonics and electronics into a single silicon chip.


Trademark
Luxtera Inc. | Date: 2013-03-25

Semiconductors which integrate photonics and electronics into a single silicon chip.


Trademark
Luxtera Inc. | Date: 2013-03-25

Semiconductors which integrate photonics and electronics into a single silicon chip.


Methods and systems for a low-parasitic silicon high-speed phase modulator are disclosed and may include fabricating an optical phase modulator that comprises a PN junction waveguide formed in a silicon layer, wherein the silicon layer may be on an oxide layer and the oxide layer may be on a silicon substrate. The PN junction waveguide may have p-doped and n-doped regions on opposite sides along a length of the PN junction waveguide, and portions of the p-doped and n-doped regions may be removed. Contacts may be formed on remaining portions of the p-doped and n-doped regions. Portions of the p-doped and n-doped regions may be removed symmetrically about the PN junction waveguide. Portions of the p-doped and n-doped regions may be removed in a staggered fashion along the length of the PN junction waveguide. Etch transition features may be removed along the p-doped and n-doped regions.

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