Agency: European Commission | Branch: FP7 | Program: CP | Phase: ICT-2009.3.7 | Award Amount: 12.99M | Year: 2010
The objective of PARADIGM is to effect a fundamental change in the way photonic integrated circuits (PICs) based on indium phosphide (InP) are designed and manufactured in Europe, with the aim of reducing the costs of design, development and manufacture by more than an order of magnitude and making more complex and capable designs possible than ever before.\n\nThe key step is to develop a generic platform technology for application-specific PICs. This will be achieved by adopting a similar methodology in the field of photonics to the one that has been so successful in microelectronics. The new approach developed in PARADIGM will be indispensable in creating a sustainable business sector with potential for significant future growth.\n\nPARADIGM addresses the whole product development chain from concept, through design and manufacturing to application. It will establish library-based design, coupled with standardized technology process flows and supported by sophisticated design tools. Our goal is to develop technical capability at the platform level, rather than at the level of individual designs, greatly reducing the cost and time required to bring a new component into production, whilst allowing the designer great freedom for creativity at the circuit level.\n\nTo establish a generic, design-rule and library-based methodology for photonic ICs is an ambitious and demanding task, which could only be contemplated with a consortium possessing a wide range of complementary skills. PARADIGM has brought together just such a collaboration of Europes key players in the fields of III-V semiconductor manufacturing, PIC design and applications, photonic CAD, packaging and assembly.\n\nThe project will verify the potential of the generic approach by fabricating a number of InP PICs, addressing a range of applications in communications, sensors, data processing and biomedical systems, at a level of complexity and performance that will define the state of the art.
Agency: European Commission | Branch: H2020 | Program: IA | Phase: ICT-29-2016 | Award Amount: 15.57M | Year: 2017
PIXAPP will establish the worlds first open access Photonic Integrated Circuit (PIC) assembly & packaging Pilot Line. It combines a highly-interdisciplinary team of Europes leading industrial & research organisations. PIXAPP provides Europes SMEs with a unique one-stop-shop, enabling them to exploit the breakthrough advantages of PIC technologies. PIXAPP bridges the valley of death, providing SMEs with an easy access route to take R&D results from lab to market, giving them a competitive advantage over global competition. Target markets include communications, healthcare & security, which are of great socio-economic importance to Europe. PIXAPPs manufacturing capabilities can support over 120 users per year, across all stages of manufacturing, from prototyping to medium scale manufacture. PIXAPP bridges missing gaps in the value chain, from assembly & packaging, through to equipment optimisation, test and application demonstration. To achieve these ambitious objectives, PIXAPP will; 1) Combine a group of Europes leading industrial & research organisations in an advanced PIC assembly & packaging Pilot Line facility.2) Develop an innovative Pilot Line operational model that coordinates activities between consortium partners & supports easy user access through a single entry point. 3) Establish packaging standards that provide cost-efficient assembly & packaging solutions, enabling transfer to full-scale industrial manufacture. 4) Create the highly-skilled workforce required to manage & operate these industrial manufacturing facilities.5) Develop a business plan to ensure Pilot Line sustainability & a route to industrial manufacturing. PIXAPP will deliver significant impacts to a wide stakeholder group, highlighting how industrial & research sectors can collaborate to address emerging socio-economic challenges.
Agency: European Commission | Branch: H2020 | Program: RIA | Phase: ICT-27-2015 | Award Amount: 3.49M | Year: 2015
Microwave photonics technology (MWP) has the potential to create a huge commercial impact by bringing together the worlds of microwave engineering and photonics and by enabling processing functionalities in microwave systems that are complex or totally impossible in the microwave domain. The main reason for not having achieved this so far has been the lack of a photonic integration technology that could address the specific needs of MWP. HAMLET aims to fill this gap and develop a disruptive photonic integration platform that will enable the development of very large scale photonic integrated circuits (VLSPICs) with cascaded stages of tunable structures for analog and digital signal processing, variety of optical processing functionalities and ultra-low optical loss. To this end, HAMLET will employ two integration levels. At the first one, it will develop a disruptive PZT-based phase-shifter technology on TriPleX platform with lower power consumption compared to thermal phase-shifters by almost one million times. At the same level HAMLET will incorporate the deposition of graphene films as a standard step in the fabrication process of polymer platform and will develop arrays of electro-absorption modulators with high bandwidth (>25 GHz). At the second integration level, HAMLET will bring together the two platforms under a 3D hybrid integration engine, and will develop circuits with record scale of integrated components (>300), record scale of functionalities with optical beamforming for 64-element antenna arrays at first place, and novel use as the interface between the wireless and the optical part at the antenna units of emerging 5G networks. Finally, in parallel with the system-related exploitation, HAMLET will also work on the unification of the two platforms under a multi-project wafer run type of services to external users, where the 3D integration engine will be used for provision of supersets of components and tools already available in the two platforms.
Agency: European Commission | Branch: H2020 | Program: RIA | Phase: COMPET-2-2016 | Award Amount: 2.84M | Year: 2016
OPTIMA aims at demonstrating photonic payloads for telecommunication satellites by joining the efforts of industrial and academic European actors from both the worlds of space and terrestrial communications. In the near future, a major increase in telecoms satellites capacity is required to address the challenges of the Digital Agenda for Europe, and to remain in line with the skyrocketing evolution of terrestrial communications, in a globally connected world. A major technological breakthrough is needed to meet the capacity increase objectives within the mass, size and power envelope allowed by the foreseen evolution of launchers and satellite platforms. Photonics has largely contributed to the revolution of Information Technology for ground applications and is the most promising technology to overcome the issues faced by Satcoms, thanks to the compact, lightweight and low-power nature of optical-fibre based equipment. However, great efforts are required to bring these benefits to the world of telecoms payloads as all the photonics equipment used on ground need to be adapted for space. In OPTIMA, Airbus Defence and Space (UK, FR), a world-leading satellite prime manufacturer, will define, assemble and a test photonic payload demonstrator based on building blocks developed, adapted for space and provided by other members of the consortium: DAS Photonics (ES), Linkra (IT), SODERN (FR), IMEC (BE) and Polatis (UK). By gathering all these actors around a concrete project, in a real-world industrial environment, OPTIMA will provide a strong initial impulse to make photonics technology available to the Satcom industry and pave the way towards an in-orbit demonstration as early as 2020. This will not only allow the European space industry to address the challenges of the DAE 2020, but also strengthen its position in a very competitive, worldwide market and create new opportunities for each of the members of the consortium (new applications, products and markets).
Agency: European Commission | Branch: FP7 | Program: CP | Phase: ICT-2013.3.2 | Award Amount: 5.36M | Year: 2014
Multi-rate, multi-format and multi-reach operation of optical transceivers is important, but it is not enough for next generation terabit products. What is still missing to make these products viable is a solution for the flexible control of this enormous capacity at the optical layer and its distribution among a number of independent optical flows. PANTHER aims to provide this solution and develop multi-rate, multi-format, multi-reach and multi-flow terabit transceivers for edge switches and data-center gateways. To this end, PANTHER will combine electro-optic with passive polymers and will develop a novel photonic integration platform with unprecedented potential for high-speed modulation and optical functionality on-chip. It will also rely on the combination of polymers with InP gain chips and photodiode arrays, and on the use of the InP-DHBT platform for driving circuits based on 3-bit power-DACs and high-speed TIA arrays. Using 3D integration techniques, PANTHER will integrate these components in compact system-in-package transceivers capable of operation at rates up to 64 Gbaud, operation with formats up to DP-64-QAM, spectral efficiency up to 10.24 b/s/Hz, capacity using a dual-carrier scheme up to 1.536 Tb/s, and flexibility in the generation and handling of multiple optical flows on-chip. This impressive performance will come with a potential for 55% power consumption reduction and more than 60% cost/bit reduction, taking into account benefits from the material system, the integration concept, the operation at high baud-rates and the possibility for IP traffic offloading. PANTHER will incorporate the transceivers in edge switch and data-center gateway architectures and will evaluate their performance in lab and real-network settings. Finally, PANTHER will develop a thin software layer that will control the operation parameters of the transceivers, pioneering in this way the efforts for extending the SDN hierarchy down to the flexible optical transport.
Agency: European Commission | Branch: FP7 | Program: CP | Phase: ICT-2013.3.2 | Award Amount: 4.09M | Year: 2013
Bandwidthhungry enduser applications are stretching physical layer capacity and dictating the migration towards software-defined flexible architectures. Fully-programmable optical components supporting rate- and format-adaptation are urgently needed.SPIRIT will fabricate low-cost, energy-efficient flexible transceivers that are capable of gridless operation and are compatible with both current and future applications. Single- and multi-carrier (OFDM) QAM formats will be supported up to a spectral efficiency of 16 bits/s/Hz (DP-256-QAM), for throughputs of up to 1Tbit/s from a single-package transceiver. Interfacing to an external FPGA will allow dynamic adjustment of the symbol rate (up to 32GBaud) and modulation format. Novel segmented-electrode InP IQ-MZMs with V1V will be developed. This allows direct digital drive using mature, high-yield CMOS electronics; SPIRIT will therefore benefit from the dominant technology in IC fabrication, constituting a cost-effective, ultra-low-power solution. Onchip, 5-bit multi-level functionality will enable arbitrary optical waveform generation and transmitter-side DSP. Record-low power consumption (1.8W per MZM arm) for a device of this resolution is targeted. Compared to current transmitters, more than 50% power consumption reduction is expected for 400G and 1T applications.The CMOS electronics and InP photonics will be integrated on a SOI platform, including coherent receivers and a novel, flexible MUX/DEMUX based on micro-ring filters, enabling spectrally efficient aggregation/segmentation of superchannels. The latter will be tunable across the entire C-band for truly gridless operation and fine-granularity spectrum slicing.SPIRIT will introduce intelligence in the optical layer. It envisages development of a software-defined network emulation platform that includes DSP performance monitoring for QoS management at the physical layer.Participation by industry leaders ensures a clear commercial exploitation path.
Agency: European Commission | Branch: FP7 | Program: CP | Phase: ICT-2009.3.7 | Award Amount: 3.92M | Year: 2010
Optical connectivity in data centers relies on 10Gb/s parallel optics that raise scalability and energy consumption issues. Efforts towards advanced modulation formats pose severe system complexity. The upgrade to 100 Gb/s to resolve the bandwidth bottleneck and increase the throughput of optical interconnect backplanes requires a disruptive yet straightforward solution. POLYSYS aims to provide this solution and realize 100Gb/s serial connectivity for rack-to-rack and chip-to-chip interconnects. POLYSYS will use electro-optic polymer as an integration platform where 100Gb/s modulators will be integrated monolithically, whereas InP lasers, detectors and electronics will be integrated hybridly. The InP-to-polymer integration technique will enable 95% coupling efficiency without using lenses and bulk optics. POLYSYS will fabricate the first serial 100Gb/s and 4x100Gb/s transmitters integrated with <1W-consuming electronic driver ICs, achieving 10 times higher line rates than mainstream 10 Gb/s VCSEL or silicon-based commercial products. POLYSYS will furthermore integrate 4x100Gb/s optoelectronic receivers monolithically in InP. The receivers will exhibit a high conversion gain to enable direct connectivity without optical amplifiers. The electronics will be integrated in arrays and the DEMUX circuit will demonstrate record low sensitivity. POLYSYS will demonstrate 4x100Gb/s direct data interconnection, increasing by 4 times the total throughput and reducing at least by a factor of 2 the required Energy/bit with respect to commercially available products. By demonstrating optical demultiplexing based on polymer, POLYSYS will show that the energy/bit can be further decreased by a factor of 5. Finally, POLYSYS will demonstrate serial 100Gb/s chip-to-chip interconnection by integrating transmitter and receiver at both ends of a polymer waveguide chip. As such POLYSYS will show compatibility with polymer backplanes and provide the technology for a tenfold capacity upgrade.
Katopodis V.,National Technical University of Athens |
Kouloumentas C.,National Technical University of Athens |
Konczykowska A.,III V Laboratory |
Jorge F.,III V Laboratory |
And 17 more authors.
Optics Express | Year: 2012
We demonstrate the first integrated transmitter for serial 100 Gb/s NRZ-OOK modulation in datacom and telecom applications. The transmitter relies on the use of an electro-optic polymer modulator and the hybrid integration of an InP laser diode and InP-DHBT electronics with the polymer board. Evaluation is made at 80 and 100 Gb/s through eyediagrams and BER measurements using a receiver module that integrates a pin-photodiode and an electrical 1:2 demultiplexer. Error-free performance is confirmed both at 80 and 100 Gb/s revealing the viability of the approach and the potential of the technology. © 2012 Optical Society of America.