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Mylavaram, India

Uma Vani M.,LBRCE | Ramana Rao P.V.,National Institute of Technology Warangal
Proceedings - 2010 International Conference on Computational Intelligence and Communication Networks, CICN 2010 | Year: 2010

This paper discusses the impact of HVDC on Power System Stability and proposes a new type of control mechanism based on Fuzzy set theory to augment dynamic performance of a multi-machine power system. To have good damping characteristics over a wide range of operating conditions, speed deviation (Δω = error1) and acceleration (Δ ώ = error3 ), of the machines are chosen as the input signals to the fuzzy controller. These input signals are first characterized by a set of linguistic variables using fuzzy set notations.The fuzzy relation matrix allows a set of fuzzy logic operations that are performed on controller inputs to obtain the desired output. The effectiveness of the proposed controller is demonstrated by a multi-machine system example. The superior performance of this fuzzy controller in comparison to the conventional fixed gain controller proves the efficiency of this new fuzzy PID controller. © 2010 IEEE.

Subba Rao N.V.,LBRCE | Kesava Rao G.,VVIT | Sivanagaraju S.,JNTUK
2012 International Conference on Advances in Power Conversion and Energy Technologies, APCET 2012 | Year: 2012

This paper proposes an efficient solution to the problem of power flow tracing in electrical transmission networks. In a competitive-market environment, deregulation of the electricity industry and thus transmission open access make it even more important to allocate the cost of transmission service fairly. Graph method and the proportional-sharing principle are employed to trace power flow; the results are then employed to determine the real power contribution of generators to lines and loads. The sequence of tracing of nodes is determined by using Breadth First Search technique. The proposed method can also be applied for reactive power tracing. The algorithm is tested on a 6 bus system. © 2012 IEEE.

Rao A.P.C.,PVPSIT | Obulesh Y.P.,LBRCE | Babu C.S.,JNTUK
ARPN Journal of Engineering and Applied Sciences | Year: 2012

In the recent past, variable speed driving systems have sprouted in various small scale and large scale applications like automobile industries, domestic appliances etc. The usage of green and eco friendly electronics are greatly developed to save the energy consumption of various devices. This lead to the development in Brushless DC motor (BLDCM). The usage of BLDCM enhances various performance factors ranging from higher efficiency, higher torque in low-speed range, high power density, low maintenance and less noise than other motors. The BLDCM can act as an alternative for traditional motors like induction and switched reluctance motors. In this paper we present a mathematical model of BLDC motor and show the values of various technical parameters using MATLAB/SIMULINK. In this paper the simulation is carried out for 120 degree mode of operation. The test results show the performance of BLDCM which are highly acceptable. Finally a PID controller is applied for closed loop speed control under various loading conditions. © 2006-2012 Asian Research Publishing Network (ARPN).

Reddy B.N.K.,Koneru Lakshmaiah College of Engineering | Suresh N.,Koneru Lakshmaiah College of Engineering | Ramesh J.V.N.,Koneru Lakshmaiah College of Engineering | Pavithra T.,Koneru Lakshmaiah College of Engineering | And 3 more authors.
2015 International Conference on Advances in Computing, Communications and Informatics, ICACCI 2015 | Year: 2015

Programming of Field Programmable Gate Arrays (FPGAs) have long been the domain of engineers with VHDL or Verilog expertise. FPGA's have caught the attention of algorithm developers and communication researchers, who want to use FPGAs to instantiate systems or implement DSP algorithms. These efforts however, are often stilled by the complexities of programming FPGAs. RTL programming in either VHDL or Verilog is generally not a high level of abstraction needed to represent the world of signal How graphs and complex signal processing algorithms. This paper describes the FPGA Programs using Graphical Language rather than Verilog VHDL with the help of LabVIEW and features of the LabVIEW FPGA environment. © 2015 IEEE.

Jayasree K.,LBRCE | Reddy B.N.K.,NIT Goa | Kumar B.S.,P.A. College | Ramesh J.V.N.,Koneru Lakshmaiah College of Engineering | And 2 more authors.
ACM International Conference Proceeding Series | Year: 2015

Multiprocessor system-on-chip (MPSoC) architectures have risen as a prevalent answer to the ever-increasing performance & reduce the power consumption requirements, that are customized to a specific application have the potential to achieve very high performance, while additionally obliging low power consumption. The power consumed and performance of the system mainly depend on the memory and communication medium of processors. There are some issues involved in memory and communication of processors. In this paper we try to avoid those issues and show two separate techniques to increase performance and reduce the power consumption. The first technique is Scratch Pad Memory (SPM) Replacement rather than cache replacement, second technique is Network on Chip (NOC) rather than Advanced Microcontroller Bus Architecture (AMBA) communication medium between processors. © 2015 ACM.

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