Hillsboro, OR, United States
Hillsboro, OR, United States

Lattice Semiconductor Corporation is a United States based manufacturer of high-performance programmable logic devices . Founded in 1983, the company employs about 700 people and has annual revenues of around $300 million, with Darin Billerbeck as the chief executive officer. The Oregon-based company is the number three ranked company in world market share for field programmable gate array devices, and number two for CPLDs & SPLDs. The company went public in 1989 and is traded on the NASDAQ stock exchange under the symbol LSCC. Wikipedia.


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Patent
Lattice Semiconductor | Date: 2017-01-20

The discovery of a topology of a network with an unknown topology can enable the selection of a data path within the network, and the establishment of a data stream over the selected data path. Routing tables mapping originating nodes to input ports can be created based on the receipt of discovery messages generated by the originating nodes. A source node can select a data path between the source node and a sink node in order to establish a data stream using the routing tables. Data paths can be selected based on, for instance, routing table bandwidth information, latency information, and/or distance information. Data streams can be established over the selected data path, and each node can release any reserved output bandwidth determined to be unnecessary for the data stream.


Patent
Lattice Semiconductor | Date: 2016-09-27

A video processing system has a source device and a sink device. The source device compresses raw video data and transmits the resulting compressed video data and at least some of the raw video data to the sink device. The sink device decompresses the transmitted compressed video data and generates a reconstructed output video frame, where each region of the output frame is based on a selection of either the corresponding raw video data or the corresponding decompressed video data. By using raw video data for some of the regions of the output frame, noticeable artifacts resulting from using a lossy video compression/decompression algorithm can be omitted. In one embodiment, the sink device compares regions of raw and decompressed video data to select data for the output frame and requests the source device to transmit specific regions of new raw video data based on those comparisons.


Patent
Lattice Semiconductor | Date: 2017-01-30

Systems and methods for beam splitting using multiple antennas are disclosed. An example wireless networking device includes an antenna system having a plurality of antennas; and a controller configured to determine directional antenna weight vectors (AWVs) directed substantially towards other wireless networking devices, determine a split beam AWV from the directional AWVs, and configure the antenna sub-system to form multiple wireless communication channels over the determined split beam AWV between the wireless networking devices. A split beam formed by the wireless networking device according to the split beam AWV maximizes a minimum gain towards, or provides at least a preset threshold minimum gain towards, each of the at other wireless networking devices.


Patent
Lattice Semiconductor | Date: 2017-01-30

Systems and methods for beam splitting using multiple antennas are disclosed. An example wireless networking device includes an antenna system having a plurality of antennas; and a controller configured to select test beam antenna weight vectors (AWVs) configured to detect and/or localize a responder device, receive channel measurement responses corresponding to the test beam AWVs, determine a combined beam AWV directed substantially towards the responder device based, at least in part, on the test beam AWVs and/or the corresponding channel measurement responses, and configure the antenna sub-system to form a wireless communication channel according to the determined combined beam AWV between the wireless networking device and the responder device.


Patent
Lattice Semiconductor | Date: 2015-05-12

Embodiments relate to a voltage oscillator (VCO) that uses a replica bias circuit to generate a cascode bias voltage. The VCO generate an output periodic signal having a frequency and phase that is less or not susceptible to voltage swings by using a bias voltage generated in a replica bias circuit that replicates a voltage-to-current converter in the VOC. The bias voltage is generated and regulated according to a power supply voltage that supplies power to the VCO to account for voltage variations in the power supply voltage.


A system for receiving and decrypting media content encrypted according to the HDCP protocol is described herein. A receiving device coupled to a plurality of content channels includes an authentication engine to authenticate each content channel and to generate an initial session key associated with each authenticated content channel. The content channels can be, for example, an HDMI channel or an MHL3 channel. A session key indicator indicating a session key used to encrypt media content is received, and an updated session key is generated. The receiving device also includes a stream cipher engine configured to decrypt received encrypted media content using the updated session key. Decrypted media content can then be displayed, for instance on a display of the receiving device.


Patent
Lattice Semiconductor | Date: 2016-07-29

Embodiments of the invention are generally directed driving data of multiple protocols through a single set of pins. An embodiment of an apparatus includes a transmitter connected to two pads on an IC the transmitter including a differential driver to transmit a differential signal, wherein the differential driver has a first branch and a second branch, each branch of the differential driver including a protection device connected to one of the pads; and a common mode driver to transmit a common mode signal, the common mode driver having a first branch and a second branch, each of the branches of the common mode driver including a protection device connected to one of the pads. The first and second switch devices are not turned on simultaneously, based on data to be transmitted, one of the switch devices being turned on and the other being turned off. The third and fourth switch devices are both turned on when the common mode signal is one of a logic HIGH or logic LOW and both turned off when the common mode signal is the other of a logic HIGH or logic LOW.


Patent
Lattice Semiconductor | Date: 2016-01-29

A cable with circuitry that enables the cable to communicate data in one of at least two different signal modes of operation is presented. In a first signal mode, the cable enables data communication between the circuitry and either a source device or a sink device. The first signal mode can be used either to communicate properties of the cable itself or of a signal passing through the cable to either the source device or the sink device. In a second signal mode, the cable enables data communication between the source device and the sink device. The second signal mode can be used to communicate data in accordance with a predetermined protocol.


In one embodiment, a ball grid array (BGA) of a packaged semiconductor device and a corresponding landing pad array of a printed circuit board each have a layout defined by an interconnection array having (i) an inner sub-array of locations having connectors arranged in rows and columns separated by a specified pitch and (ii) an outer rectangular ring of locations having connectors arranged in rows and columns separated by the specified pitch. The outer rectangular ring is separated from the inner sub-array by a depopulated rectangular ring having a width of at least twice the specified pitch, wherein the depopulated rectangular ring has no connectors. The outer rectangular ring has empty locations having no connectors. Some of those empty locations define depopulated sets that divide the outer rectangular ring into a number of different contiguous sets of locations having connectors that enable pin escape for connectors of the devices BGA.


Patent
Lattice Semiconductor | Date: 2016-01-07

A first network signal is received indicating a device identifier in response to a transaction involving an electronic device uniquely associated with the device identifier. An entity identifier specific to an entity associated with the transaction is determined. In response to an initialization event of the electronic device, a second network signal from the electronic device is received that identifies the electronic device. In response to the second network signal, a configuration is communicated to the electronic device that is specific to the entity associated with the transaction.

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