Neubiberg, Germany
Neubiberg, Germany

Lantiq is a fabless semiconductor company of approximately 1,000 people based in Germany. Wikipedia.

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Patent
Lantiq | Date: 2017-02-01

A PLC modem (131-133) is prompted to increase, starting from a predetermined minimum transmit power, a transmit power of data transmission on a PLC channel (112) at a given time or time period defined with respect to a mutual time reference of a DSL channel (111) and the PLC channel (112). A DSL modem (121) is prompted to measure a signal-to-noise value at the given time or time period defined with respect to the mutual time reference. Mitigation of interference 190 between the PLC channel (112) and the DSL channel (111) becomes possible.


Patent
Lantiq | Date: 2017-01-18

Methods and devices are presented using reference virtual noise for computing a bit loading.


Representative implementations of devices and techniques provide communication between networked nodes while minimizing interference from neighbor network communication. Medium Access Control (MAC) cycles at the nodes may be aligned to MAC cycles of neighbor nodes and/or networks based on decoded timing information detected by the nodes.


Patent
Lantiq | Date: 2017-03-20

Embodiments related to retransmission in a communication system are described and depicted. In one embidiment, a retransmission entity repeats a transmission of a data transfer unit by the device after a predetermined number of other transmitted data transfer units has been transmitted. The retransmission entity may also determine whether a measure for a time period since the first transmission of the data transfer unit by the device has exceeded a predetermined threshold and to provide a final transmission of the data transfer unit based on the determining that the measure for the time period has exceeded the predetermined threshold.


Patent
Lantiq | Date: 2017-01-18

A Digital Subscriber Line, DSL/G.fast/G.hn, transceiver comprising a plurality of first interfaces configured to transmit data packet streams in a downlink direction to different subscribers and to receive data packet streams from the different subscribers, a second interface configured to transmit data packet streams in an uplink direction to a passive optical network element, and at least one processing unit configured to detect a physical layer indicator of a loss of signal of one of the first interfaces received at a physical layer at said one first interface, wherein when the at least one processing unit detects the physical layer indicator for said one first interface, the second interface transmits the physical layer indicator in the uplink direction to the passive optical network element.


Patent
Lantiq | Date: 2017-02-22

First transistor logic is arranged by a first logic provider in circuit form and provides a minimum of functionality of the semiconductor device employed to bring up the semiconductor device, wherein the minimum of functionality is encrypted using a first encryption key. Second transistor logic is arranged by a second logic provider, different than the first logic provider, in circuit form to include security keys capable to perform cryptographic capabilities using a second encryption key. The second transistor logic further includes functionality that completes the semiconductor device as a chip device and is ready to process secure communication signals.


Patent
Lantiq | Date: 2017-01-11

Simulation devices for simulating communication lines are provided. In some embodiments, different parameters are used along a line length.


Patent
Lantiq | Date: 2017-03-08

Representative implementations of devices and techniques provide communication between networked nodes operating on a communication network medium. In an implementation, a node generates a broadcast frame that includes at least a preamble and a payload. The preamble of the broadcast frame may include auxiliary information. The auxiliary information may be associated with one or more symbols of the preamble. The auxiliary information may contain power boost information.


Patent
Lantiq | Date: 2017-04-12

An on-chip data packet processing method and corresponding integrated circuit, wherein data packets are received at an ingress port and processed with an on-chip wire-speed engine. The processing comprises adding metadata to the data packets, forwarding the processed data to an on-chip QoS unit, altering the metadata of the data packets and/or providing further metadata to the data packets. The data packets are forwarded from the on-chip QoS unit to an on-chip data consumer. If the data consumer is a processing unit the data packets are processed in a first processing step, redirected from the processing unit to the QoS unit and the step of forwarding the data packets to an on-chip data consumer is repeated.


Patent
Lantiq | Date: 2017-04-12

A chip (110) is provided, comprising: an integrated circuit (230) comprising a plurality of logic elements (231), wherein the plurality of logic elements (231) is configured to form, in a test mode, a plurality of scan chains (232). The chip (110) further comprises an on-chip signal generator (220) connected with the integrated circuit (230) and configured to provide, in the test mode, a test pattern signal (281) to the plurality of scan chains (232).

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