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Colombelles, France

Rayas-Sanchez J.E.,University of Guadalajara | Pasquet D.,LaMIPS | Szendrenyi B.,Advantest Corporation | Gupta M.S.,University of California at San Diego
IEEE Microwave Magazine | Year: 2015

Reports on major events and activities that were part of the MTT-S Mexico trip. © 2000-2012 IEEE. Source

Tran L.N.,Cergy-Pontoise University | Bourdel E.,Cergy-Pontoise University | Quintanel S.,Cergy-Pontoise University | Pasquet D.,LaMIPS
International Journal of Microwave and Wireless Technologies | Year: 2010

In order to perform an accurate design, in particular in non-linear circuit, the equivalent circuit of inductors must be precisely described in a wide frequency band. Many models have been proposed to describe the behavior of inductors on lossy substrate. They consist of a great number of elements, often suggested by physical phenomena. Most of them cannot be extracted from measurements. In this paper, we propose a model composed only of elements that can be analytically extracted from measurement results. © 2010 Cambridge University Press and the European Microwave Association. Source

Andrei C.,NXP Semiconductors | Pasquet D.,LaMIPS
Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting | Year: 2011

An innovative method for verification of de-embedding errors after inductor on-wafer measurements is presented. This first de-embedding verification method, there were no references found in literature, is easy to implement by designing a LC circuit with a Metal Insulator Metal (MIM) capacitor inside the Ground-Signal-Ground (GSG) test structure used for inductor characterization. The S parameter measurements of LC circuit (L-inductor under test, C-MIM) and of an "open dummy" including the MIM, are used to cross-check the inductor measurements in order to verify the de-embedding accuracy. This verification allows an easy identification of S-parameter measurement issues and of de-embedding in-accuracies, and futures an important gain of time for small signal equivalent circuit extraction. The method has been validated in the case of "8-shaped" inductor fabricated in QuBiC (Quality Bipolar CMOS) process by measurements up to 50 GHz. © 2011 IEEE. Source

Pagazani J.,University Paris Est Creteil | Lissorgues G.,University Paris Est Creteil | Mehdaoui A.,Coventor SARL | Schropfer G.,Coventor SARL | And 3 more authors.
Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2015 | Year: 2015

The work is related to an Agile Filter which is a specific RF block to be inserted between an antenna and a first stage of pre-amplification in future on board antenna systems or any future multi-purpose communications terminals. It will be able to process signals in the frequency range between 2 and 18 GHz with target insertion loss below 3dB. The basic idea of the demonstrator studied and developed in this project is to evaluate a SiP approach combining heterogeneous technologies and 3D integration and packaging. This paper presents the process flow used to design, fabricate and integrate in 3D a tunable RF filter which tunability is obtained by the use of MEMS varactors based on a copper on glass technology and stacked on micro-PCD for the electronic control functions. MEMS+ parameterized structures for RF MEMS varactor designs are presented with dimension constraints to be compatible with the space available at the end of each combline sub-filter. Indeed, the MEMS capacitors are composed of a mobile square membrane of 210μm by side and overall size of 600μm. In addition, these RF MEMS tunable capacitor models were automatically transferred into VerilogA for rapid system-level simulation usable further in ADS environment to verify the RF performances. © 2015 IEEE. Source

Palczynska A.,Wroclaw University of Technology | Wymyslowski A.,Wroclaw University of Technology | Bieniek T.,Polish Institute of Electron Technology | Janczyk G.,Polish Institute of Electron Technology | And 2 more authors.
2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014 | Year: 2014

Cross-talk (XT) is a phenomenon affecting signals propagated in electronic circuitry. In a general case if a signal is transmitted in one system it creates an undesired effect in another, which is due to the crosstalk. The crosstalk is usually caused by parasitic capacitances, inductances, or conductive coupling. In wireless communication, crosstalk is often denoted as a co-channel interference, and is related to adjacent-channel interference. The above is especially important for high frequency ranges, which are used in wireless RF applications. In integrated circuit design, crosstalk normally refers to a signal affecting another nearby signal. Usually the coupling is capacitive but other forms of coupling and effects on signal further away are sometimes important as well, especially in analogue and digital circuits. The main problem is how to prevent this phenomena in order to sustain the signal integrity. There are a wide variety of possible fixes, with the increased spacing, wire reordering and/or appropriate shielding. In fact it requires application of specific design rules during the prototyping stage. In the paper the experimental and numerical analysis of a crosstalk problem is presented. The experimental measurement were performed on manufactured test samples prepared on Si substrates with predefined configuration of aluminium lines / wires. Numerical modelling was based on finite element method (FEM) including both 2D and 3D simulations. © 2014 IEEE. Source

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