Gumi, South Korea

Kumoh National Institute of Technology is a national research and business development university in Republic of Korea . It is located in Gumi City, Gyeongbuk, South Korea. Wikipedia.


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Patent
Samsung and Kumoh National Institute of Technology | Date: 2014-05-13

Disclosed are an electron emitting device using graphene and a method for manufacturing the same. The electron emitting device includes a metal holder having at least one slot, at least one emitter plate inserted into the slot to protrude from a first surface of the metal holder, and including an emitter supporting member and a graphene emitter attached onto the emitter supporting member, an insulation layer provided on the first surface of the metal holder, and a gate electrode provided on the insulation layer and including a gate supporting member and a graphene gate attached onto the gate supporting member.


Patent
Samsung and Kumoh National Institute of Technology | Date: 2017-03-22

Disclosed are an electron emitting device using graphene and a method for manufacturing the same. The electron emitting device includes a metal holder having at least one slot, at least one emitter plate inserted into the slot to protrude from a first surface of the metal holder, and including an emitter supporting member and a graphene emitter attached onto the emitter supporting member, an insulation layer provided on the first surface of the metal holder, and a gate electrode provided on the insulation layer and including a gate supporting member and a graphene gate attached onto the gate supporting member.


Patent
Kumoh National Institute of Technology and Samsung | Date: 2012-07-19

A method for preparing nanotubes by providing nanorods of a piezoelectric material having an asymmetric crystal structure and by further providing hydroxide ions to the nanorods to etch inner parts of the nanorods to form the nanotubes.


Yun J.-H.,Kumoh National Institute of Technology | Shin K.G.,University of Michigan
IEEE Journal on Selected Areas in Communications | Year: 2011

Femtocell technology has been drawing considerable attention as a cost-effective means of extending cellular coverage and enhancing capacity as well as realizing its potential, when combined with orthogonal frequency-division multiple access (OFDMA), for improved indoor broadband wireless services. However, under the expected co-channel deployment of femtoand macro-cells, femtocells may incur high uplink interference to macrocells, and vice versa. To mitigate this interference, we propose a distributed and self-organizing femtocell management architecture, called the Complementary TRi-control Loops (CTRL), that consists of three control loops to determine (1) maximum transmit power of femtocell users based on the fedback macrocell load margin for protection of the macrocell uplink communications; (2) target signal to interference plus noise ratios (SINRs) of femtocell users to reach a Nash equilibrium; and (3) instantaneous transmit power of femtocell users to achieve the target SINRs against bursty interference from other nearby users. CTRL requires neither special hardware nor change to the radio resource management (RRM) of existing macrocells, thus facilitating non-disruptive (hence seamless) penetration of femtocells. Also, CTRL guarantees convergence in the presence of environmental changes and delayed feedback. Our evaluation has shown CTRL to successfully preserve the macrocell users' service quality under highly dynamic user transmission conditions and be able to make a tradeoff between macrocell and femtocell capacities. © 2011 IEEE.


Patent
LG Siltron Inc. and Kumoh National Institute of Technology | Date: 2013-09-04

Provided are a compound semiconductor device and a manufacturing method thereof. A substrate and a graphene oxide layer are provided on the substrate. A first compound semiconductor layer is provided on the graphene oxide layer. The first compound semiconductor layer is selectively grown from the substrate exposed by the graphene oxide.


Patent
LG Siltron Inc. and Kumoh National Institute of Technology | Date: 2013-09-04

According to the present invention, a method for manufacturing a compound semiconductor comprises: forming a graphene-derived material layer on either a first selected substrate or a first selected compound semiconductor layer; forming a second compound semiconductor layer of at least one layer on at least said graphene-derived material layer, and changing the graphene-derived material layer so as to separate said second compound semiconductor layer of at least one layer.


The present invention relates to a method for recovering elemental silicon from silicon sludge by electrolysis in a non-aqueous electrolyte. The recovery method of silicon according to the present invention can achieve direct reduction of silicon by electrolysis at a low temperature (below 200 C.), control the structure of silicon by a simple process and a change in electrolysis conditions, and perform a continuous process by adding a silicon salt.


Patent
Kumoh National Institute of Technology | Date: 2013-09-19

The present invention provides a method for preparing metallic lithium by electrolysis using a non-aqueous electrolyte at low temperature. The method for preparing metallic lithium according to the present invention can directly prepare metallic lithium by electrolysis at a low temperature, and enable mass production, and reduce the manufacturing cost due to its simple process and easy control of electrolytic conditions, and thus the method for preparing lithium thin films according to the present invention can be applied in the industry.


Patent
Kumoh National Institute of Technology | Date: 2014-08-28

A field emission device may comprise: an emitter comprising a cathode electrode and an electron emission source supported by the cathode electrode; an insulating spacer around the emitter, the insulating spacer forming an opening that is a path of electrons emitted from the electron emission source; and/or a gate electrode comprising a graphene sheet covering the opening. A method of manufacturing a gate electrode may comprise: forming a graphene thin film on one surface of a conductive film; forming a mask layer having an etching opening on another surface of the conductive film, wherein the etching opening exposes a portion of the conductive film; partially removing the conductive film through the etching opening to partially expose the graphene thin film; and/or removing the mask layer.


Patent
Kumoh National Institute of Technology | Date: 2014-09-01

A field emission device may comprise: an emitter comprising a cathode electrode and an electron emission source supported by the cathode electrode; an insulating spacer around the emitter, the insulating spacer forming an opening that is a path of electrons emitted from the electron emission source; and/or a gate electrode around the opening. The electron emission source may comprise a plurality of graphene thin films vertically supported in the cathode electrode toward the opening.

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