Kulicke and Soffa Industries Inc.

Irvine, CA, United States

Kulicke and Soffa Industries Inc.

Irvine, CA, United States
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Patent
Kulicke and Soffa Industries Inc. | Date: 2017-04-19

A thermocompression bonding system for bonding semiconductor elements is provided. The thermocompression bonding system includes (1) a bond head assembly including a heater for heating an semiconductor element to be bonded, the bond head assembly including a fluid path configured to receive a cooling fluid; (2) a pressurized cooling fluid source; (3) a booster pump for receiving a pressurized cooling fluid from the pressurized cooling fluid source, and for increasing a pressure of the received pressurized cooling fluid; (4) a pressurized fluid reservoir for receiving pressurized cooling fluid from the booster pump; and (5) a control valve for controlling a supply of pressurized cooling fluid from the pressurized fluid reservoir to the fluid path.


A method of operating a bonding machine is provided. The method includes the steps of: (a) carrying a semiconductor element with a transfer tool; and (b) transferring the semiconductor element from the transfer tool to a bonding tool of the bonding machine without the transfer tool and the bonding tool contacting the semiconductor element at the same time.


A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).


Patent
Kulicke and Soffa Industries Inc. | Date: 2017-03-13

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.


Patent
Kulicke and Soffa Industries Inc. | Date: 2017-03-14

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between ones of the first conductive structures and respective ones of the second conductive structures; and (c) forming completed bonds between the first conductive structures and the second conductive structures.


Patent
Kulicke and Soffa Industries Inc. | Date: 2017-03-03

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.


Patent
Kulicke and Soffa Industries Inc. | Date: 2016-10-20

A method of forming a wire interconnect structure includes the steps of: (a) forming a wire bond at a bonding location on a substrate using a wire bonding tool; (b) extending a length of wire, continuous with the wire bond, to another location; (c) pressing a portion of the length of wire against the other location using the wire bonding tool; (d) moving the wire bonding tool, and the pressed portion of the length of wire, to a position above the wire bond; and (e) separating the length of wire from a wire supply at the pressed portion, thereby providing a wire interconnect structure bonded to the bonding location.


Patent
Kulicke and Soffa Industries Inc. | Date: 2016-08-11

A method of providing a z-axis force profile applied to a plurality of bonding locations during a wire bonding operation is provided. The method includes: (a) determining a z-axis force profile for each of a plurality of bonding locations on an unsupported portion of at least one reference semiconductor device; and (b) applying the z-axis force profile during subsequent bonding of a subject semiconductor device. Methods of: determining a maximum bond force applied to a bonding location during formation of a wire bond; and determining a z-axis constant velocity profile for formation of a wire bond, are also provided.


A bond head assembly for bonding a semiconductor element to a substrate is provided. The bond head assembly includes a base structure, a heater, and a clamping system securing the heater to the base structure. The clamping system includes a plurality of elastic elements constraining the heater along a plurality of axes.


A bond head assembly for bonding a semiconductor element to a substrate is provided. The bond head assembly includes a base structure, a heater, and a clamping system securing the heater to the base structure. The clamping system includes a plurality of elastic elements constraining the heater along a plurality of axes.

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