Milpitas, CA, United States
Milpitas, CA, United States

KLA-Tencor Corporation is an American manufacturing company based in Milpitas, California. It supplies process control and yield management products for the semiconductor, data storage, LED, and other related nanoelectronics industries. The company's products, software and services are designed to help integrated circuit manufacturers manage yield throughout the entire fabrication process — from research and development to final volume production. Wikipedia.

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KLA Tencor | Date: 2016-11-14

A defect detection method includes acquiring a reference image; selecting a target region of the reference image; identifying, based on a matching metric, one or more comparative regions of the reference image corresponding to the target region; acquiring a test image; masking the test image with the target region of the reference image and the one or more comparative regions of the reference image; defining a defect threshold for the target region in the test image based on the one or more comparative regions in the test image; and determining whether the target region of the test image contains a defect based on the defect threshold.

KLA Tencor | Date: 2016-11-16

Methods and systems for detecting defects on a specimen are provided. One system includes a generative model. The generative model includes a non-linear network configured for mapping blocks of pixels of an input feature map volume into labels. The labels are indicative of one or more defect-related characteristics of the blocks. The system inputs a single test image into the generative model, which determines features of blocks of pixels in the single test image and determines labels for the blocks based on the mapping. The system detects defects on the specimen based on the determined labels.

The present disclosure is directed to laser produced plasma light sources having a target material, such as Xenon, that is coated on the outer surface of a drum. Embodiments include bearing systems for rotating the drum that have structures for reducing leakage of contaminant material and/or bearing gas into the LPP chamber. Injection systems are disclosed for coating and replenishing target material on the drum. Wiper systems are disclosed for preparing the target material surface on the drum, e.g. smoothing the target material surface. Systems for cooling and maintaining the temperature of the drum and a housing overlying the drum are also disclosed.

The present disclosure is directed to laser produced plasma light sources having a target material, such as Xenon, that is coated on the outer surface of a cylindrically-symmetric element (e.g., drum). Embodiments include a pre-pulsing arrangement which can be optimized to reduce irradiation damage to the drum and a pulse trimming unit which can be employed to reduce irradiation damage to the drum. In addition, an embodiment is disclosed wherein the surface of a cylindrically-symmetric element is formed with a plurality of grooves having a groove depth greater than 1 mm and a focusing unit focusing a laser beam and establishing an irradiation site to produce plasma from the target material, with the irradiation site distanced from a groove surface portion to protect the surface portion from irradiation damage.

A repetition rate (pulse) multiplier includes one or more beam splitters and prisms forming one or more ring cavities with different optical path lengths that delay parts of the energy of each pulse. A series of input laser pulses circulate in the ring cavities and part of the energy of each pulse leaves the system after traversing the shorter cavity path, while another part of the energy leaves the system after traversing the longer cavity path, and/or a combination of both cavity paths. By proper choice of the ring cavity optical path length, the repetition rate of an output series of laser pulses can be made to be a multiple of the input repetition rate. The relative energies of the output pulses can be controlled by choosing the transmission and reflection coefficients of the beam splitters. Some embodiments generate a time-averaged output beam profile that is substantially flat in one dimension.

KLA Tencor | Date: 2017-02-01

Field curvature of an optical system is modified based on topography of the surface of a wafer such that an image of each of the segments of the surface is in focus across the segment. The wafer may be non-planar. The optical system may be a multi-element lens system connected to a controller that modifies the field curvature by changing position of the lens elements. The wafer may be held by a chuck, such as an edge grip chuck. Multiple optical systems may be arranged across a dimension of the wafer.

Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.

A wafer metrology system includes an interferometer sub-system and a controller. The interferometer sub-system is configured to generate an interferogram with an intensity map that corresponds to a modulated representation of a wafer surface. Further, the interferometer sub-system includes a detector configured to capture the interferogram. The controller includes one or more processors configured to generate a wrapped phase map of the interferogram, define patterns associated with features on the wafer, and correct phase discontinuities by applying a phase unwrapping procedure to the wrapped phase map to generate an unwrapped phase map and correcting phase discontinuities in the unwrapped phase map based on the patterns, or by combining phase unwrapping and correction in a unified step. Further, the patterns comprise two or more structures such that a portion of the unwrapped phase map associated with structures of the same type is continuous across borders separating structures of the same type.

Disclosed are methods and apparatus for qualifying a photolithographic reticle. A reticle inspection tool is used to acquire images at different imaging configurations from each of the pattern areas of a calibration reticle. A reticle near field is recovered for each of the pattern areas of the calibration reticle based on the acquired images from each pattern area of the calibration reticle. Using the recovered reticle near field for the calibration reticle, a lithography model for simulating wafer images is generated based on the reticle near field. Images are then acquired at different imaging configurations from each of the pattern areas of a test reticle. A reticle near field for the test reticle is then recovered based on the acquired images from the test reticle. The generated model is applied to the reticle near field for the test reticle to simulate a plurality of test wafer images, and the simulated test wafer images are analyzed to determine whether the test reticle will likely result in an unstable or defective wafer.

Agency: European Commission | Branch: H2020 | Program: ECSEL-IA | Phase: ECSEL-15-2015 | Award Amount: 150.05M | Year: 2016

The TAKE5 project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 10nm technology node and the ECSEL JU project SeNaTe aiming at the 7nm technology node. The main objective of the TAKE5 project is the demonstration of 5nm patterning in line with the industry needs and the ITRS roadmap in the Advanced Patterning Center at the imec pilot line using innovative design and technology co-optimization, layout and device architecture exploration, and comprising demonstration of a lithographic platform for EUV technology, advanced process and holistic metrology platforms and new materials. A lithography scanner will be developed based on EUV technology to achieve the 5nm module patterning specification. Metrology platforms need to be qualified for 5nm patterning of 1D, 2D and 3D geometries with the appropriate precision and accuracy. For the 5nm technology modules new materials will need to be introduced. Introduction of these new materials brings challenges for all involved deposition processes and the related equipment set. Next to new deposition processes also the interaction of the involved materials with subsequent etch steps will be studied. The project will be dedicated to find the best options for patterning. The project relates to the ECSEL work program topic Process technologies More Moore. It addresses and targets as set out in the MASP at the discovery of new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the nano-structuring of electronic devices with 5nm resolution in high-volume manufacturing and fast prototyping. The project touches the core of the continuation of Moores law which has celebrated its 50th anniversary and covers all aspects of 5nm patterning development.

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