Milpitas, CA, United States
Milpitas, CA, United States

KLA-Tencor Corporation is an American manufacturing company based in Milpitas, California. It supplies process control and yield management products for the semiconductor, data storage, LED, and other related nanoelectronics industries. The company's products, software and services are designed to help integrated circuit manufacturers manage yield throughout the entire fabrication process — from research and development to final volume production. Wikipedia.


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Patent
KLA Tencor | Date: 2017-01-18

A pick-and-place head for picking a plurality of work-pieces from at least one first location and for placing the plurality of work-pieces at least one second location is disclosed. The pick-and-place head exhibits a plurality of nozzles, wherein each nozzle is configured to engage one of the work-pieces by action of a vacuum. At least one nozzle has an individual vacuum supply and at least two further nozzles have a shared vacuum supply. A corresponding method is also disclosed, the method including the steps of approaching at least one of the plurality of work-pieces with a respective nozzle and then starting generation of a vacuum at each respective nozzle. The generation of vacuum in at least one nozzle is achieved by an individual vacuum supply, and generation of vacuum in at least two further nozzles is achieved by a shared vacuum supply of the at least two further nozzles.


A wafer metrology system includes an interferometer sub-system and a controller. The interferometer sub-system is configured to generate an interferogram with an intensity map that corresponds to a modulated representation of a wafer surface. Further, the interferometer sub-system includes a detector configured to capture the interferogram. The controller includes one or more processors configured to generate a wrapped phase map of the interferogram, define patterns associated with features on the wafer, and correct phase discontinuities by applying a phase unwrapping procedure to the wrapped phase map to generate an unwrapped phase map and correcting phase discontinuities in the unwrapped phase map based on the patterns, or by combining phase unwrapping and correction in a unified step. Further, the patterns comprise two or more structures such that a portion of the unwrapped phase map associated with structures of the same type is continuous across borders separating structures of the same type.


An apparatus, a method and a computer program product for defect detection in work pieces is disclosed. At least one light source is provided and the light source generates an illumination light of a wavelength range at which the work piece is transparent. A camera images the light from at least one face of the work piece on a detector of the camera by means of a lens. A stage is used for moving the work piece and for imaging the at least one face of the semiconductor device completely with the camera. The computer program product is disposed on a non-transitory, computer readable medium for defect detection in work pieces. A computer is used to execute the various process steps and to control the various means of the apparatus.


Patent
KLA Tencor | Date: 2017-01-25

A photoresist modelling system includes a mathematical model for a photolithography process. The mathematical model may be executable using a computer processor. The mathematical model may be used to model a photoresist as formed on a semiconductor wafer surface. A blocked polymer concentration gradient equation may be implemented into the mathematical model. The blocked polymer concentration gradient equation may describe an initial concentration gradient of a blocked polymer in the photoresist being modelled by the mathematical model.


Patent
KLA Tencor | Date: 2017-02-08

Target designs and methods are provided, which relate to periodic structures having elements recurring with a first pitch in a first direction. The elements are periodic with a second pitch along a second direction that is perpendicular to the first direction and are characterized in the second direction by alternating, focus-sensitive and focus-insensitive patterns with the second pitch. In the produced targets, the first pitch may be about the device pitch and the second pitch may be several times larger. The first, focus-insensitive pattern may be produced to yield a first critical dimension and the second, focus-sensitive pattern may be produced to yield a second critical dimension that may be equal to the first critical dimension only when specified focus requirements are satisfied, or provide scatterometry measurements of zeroth as well as first diffraction orders, based on the longer pitch along the perpendicular direction.


Patent
KLA Tencor | Date: 2017-01-05

Disclosed are apparatus and methods for inspecting or measuring a specimen. A system comprises an illumination channel for generating and deflecting a plurality of incident beams to form a plurality of spots that scan across a segmented line comprised of a plurality of scan portions of the specimen. The system also includes one or more detection channels for sensing light emanating from a specimen in response to the incident beams directed towards such specimen and collecting a detected image for each scan portion as each incident beams spot is scanned over its scan portion. The one or more detection channels include at least one longitudinal side channel for longitudinally collecting a detected image for each scan portion as each incident beams spot is scanned over its scan portion.


Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.


Patent
KLA Tencor | Date: 2017-02-01

Field curvature of an optical system is modified based on topography of the surface of a wafer such that an image of each of the segments of the surface is in focus across the segment. The wafer may be non-planar. The optical system may be a multi-element lens system connected to a controller that modifies the field curvature by changing position of the lens elements. The wafer may be held by a chuck, such as an edge grip chuck. Multiple optical systems may be arranged across a dimension of the wafer.


A repetition rate (pulse) multiplier includes one or more beam splitters and prisms forming one or more ring cavities with different optical path lengths that delay parts of the energy of each pulse. A series of input laser pulses circulate in the ring cavities and part of the energy of each pulse leaves the system after traversing the shorter cavity path, while another part of the energy leaves the system after traversing the longer cavity path, and/or a combination of both cavity paths. By proper choice of the ring cavity optical path length, the repetition rate of an output series of laser pulses can be made to be a multiple of the input repetition rate. The relative energies of the output pulses can be controlled by choosing the transmission and reflection coefficients of the beam splitters. Some embodiments generate a time-averaged output beam profile that is substantially flat in one dimension.


Grant
Agency: European Commission | Branch: H2020 | Program: ECSEL-IA | Phase: ECSEL-15-2015 | Award Amount: 150.05M | Year: 2016

The TAKE5 project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 10nm technology node and the ECSEL JU project SeNaTe aiming at the 7nm technology node. The main objective of the TAKE5 project is the demonstration of 5nm patterning in line with the industry needs and the ITRS roadmap in the Advanced Patterning Center at the imec pilot line using innovative design and technology co-optimization, layout and device architecture exploration, and comprising demonstration of a lithographic platform for EUV technology, advanced process and holistic metrology platforms and new materials. A lithography scanner will be developed based on EUV technology to achieve the 5nm module patterning specification. Metrology platforms need to be qualified for 5nm patterning of 1D, 2D and 3D geometries with the appropriate precision and accuracy. For the 5nm technology modules new materials will need to be introduced. Introduction of these new materials brings challenges for all involved deposition processes and the related equipment set. Next to new deposition processes also the interaction of the involved materials with subsequent etch steps will be studied. The project will be dedicated to find the best options for patterning. The project relates to the ECSEL work program topic Process technologies More Moore. It addresses and targets as set out in the MASP at the discovery of new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the nano-structuring of electronic devices with 5nm resolution in high-volume manufacturing and fast prototyping. The project touches the core of the continuation of Moores law which has celebrated its 50th anniversary and covers all aspects of 5nm patterning development.

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