Entity

Time filter

Source Type


Xiao Y.G.,Key Laboratory for Low Dimensional Materials and Application Technology of Ministry of Education | Tang M.H.,Key Laboratory for Low Dimensional Materials and Application Technology of Ministry of Education | Xiong Y.,Xiangtan University | Li J.C.,National University of Defense Technology | And 7 more authors.
Current Applied Physics | Year: 2012

The surface potential and drain current of double-gate metal-ferroelectric- insulator-semiconductor (MFIS) field-effect transistor were investigated by using the ferroelectric negative capacitance. The derived results demonstrated that the up-converted semiconductor surface potential and low subthreshold swing S = 34 (<60 mV/dec) can be realized with appropriate thicknesses of ferroelectric thin film and insulator layer at room temperature. What's more, a reduction gate voltage about 260 mV can be reached if the ON-state current is fixed to 600 μA/μm. It is expected that the derived results can offer useful guidelines for the application of low power dissipation in ongoing scaling of FETs. © 2012 Elsevier B.V. All rights reserved. Source

Discover hidden collaborations