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Newport Beach, CA, United States

Stefanov K.D.,Open University Milton Keynes | Zhang Z.,Rutherford Appleton Laboratory | Damerell C.,Rutherford Appleton Laboratory | Burt D.,E2v Technologies | Kar-Roy A.,Jazz Semiconductor Inc.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2013

Buried channel (BC) MOSFETs are known to have better noise performance than surface channel (SC) MOSFETs when used as source followers in modern Charge Coupled Devices (CCD). CMOS image sensors find increasing range of applications and compete with CCDs in high performance imaging, however BC transistors are rarely used in CMOS. As a part of the development of charge storage using BC CCDs in CMOS, we designed and manufactured deep depletion BC n-type MOSFETs in 0.18 μm CMOS image sensor process. The transistors are designed in a way similar to the source followers in a typical BC CCD. In this paper we report the results from their characterization and compare with enhancement mode and "zero-threshold" SC devices. In addition to the detailed current-voltage and noise measurements, semiconductor device simulation results are presented to illustrate and understand the different conditions affecting the channel conduction and the noise performance of the BC transistors at low operating voltages. We show that the biasing of the BC transistors has to be carefully adjusted for optimal operation, and that their noise performance at the right operating conditions can be superior to SC devices, despite their lower gain as in-pixel source followers. © 2013 SPIE. Source


Moen K.A.,Georgia Institute of Technology | Moen K.A.,Jazz Semiconductor Inc. | Chakraborty P.S.,Georgia Institute of Technology | Raghunathan U.S.,Georgia Institute of Technology | And 2 more authors.
IEEE Transactions on Electron Devices | Year: 2012

We study mixed-mode stress degradation in SiGe HBTs using a novel physical TCAD model in which the processes of hot carrier generation within the semiconductor, carrier propagation to the oxide interface, and formation of interface traps are directly modeled. Transient degradation simulations using a calibrated 2-D SiGe HBT model correlate well with measured data. With this novel simulation tool, we investigate the bias dependence and location of interface traps and show that secondary holes produced by impact ionization are the dominant carrier to damage the emitter-base (EB) spacer oxide interface, confirming previously reported results. We also compare in detail trap formation at the EB spacer and shallow-trench-isolation (STI) oxide interfaces as a function of time and stress condition. At the STI oxide interfaces, we find that hot electrons and holes each dominate trap formation in different regions, and the hot carriers that reach the STI predominately originate outside of the selectively implanted collector, revealing the important role played by dopant diffusion from the extrinsic base of quasi-self-aligned SiGe HBTs. © 2012 IEEE. Source


Stefanov K.D.,Open University Milton Keynes | Zhang Z.,Rutherford Appleton Laboratory | Damerell C.,Rutherford Appleton Laboratory | Burt D.,E2v Technologies | Kar-Roy A.,Jazz Semiconductor Inc.
IEEE Transactions on Electron Devices | Year: 2013

Buried-channel (BC) MOSFETs are known to have better noise performance than their surface-channel (SC) counterparts when used as a source follower in modern chargecoupled devices (CCDs). CMOS image sensors are finding increasing applications and compete with CCDs in highperformance imaging, but BC transistors are rarely used in CMOS. As a part of the development of charge storage using CCDs in CMOS, we designed and manufactured deep-depletion BC n-type MOSFETs in 0.18-?m CMOS image sensor process. The BC transistors are designed in a way similar to the source followers in a typical BC CCD, and feature deep n-channel implant and threshold voltage exceeding ?2.5 V. In this paper, we report the results from their characterization and compare them with normal enhancement mode and "zero-threshold" SC devices. In addition to the detailed current-voltage and noise measurements, 2-D semiconductor device simulation results are presented to illustrate and understand the different conditions affecting the channel conduction and the noise performance of the BC transistors. We show that under optimal bias conditions the noise performance of the BC transistors can be superior despite their lower gain as in-pixel source followers. © 1963-2012 IEEE. Source


Trademark
Jazz Semiconductor Inc. and Specialtysemi Inc. | Date: 2006-07-18

Semiconductor devices, semiconductor wafers and integrated circuits.


Guoxuan Q.,University of Wisconsin - Madison | Guoxuan Q.,Tianjin University | Ningyue J.,University of Wisconsin - Madison | Ningyue J.,Avago Technologies | And 8 more authors.
Semiconductor Science and Technology | Year: 2010

The performance of a SiGe heterojunction bipolar transistor (HBT) millimetre-wave power amplifier (PA) operating at cryogenic temperature was reported and analysed for the first time. A 24 GHz two-stage medium PA employing common-emitter and common-base SiGe power HBTs in the first and the second stage, respectively, showed a significant power gain increase at 77 K in comparison with that measured at room temperature. Detailed analyses indicate that cryogenic operation of SiGe HBT-based PAs mainly affects (improves) the performance of the SiGe HBTs in the circuits due to transconductance enhancement through magnified, favourable changes of SiGe bandgap due to cooling (ΔE g/kT) and minimized thermal effects, with little influence on the passive components of the circuits. © 2010 IOP Publishing Ltd. Source

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