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Ghadiry M.H.,Universiti Sains Malaysia | Nadi S. M.,Islamic Azad University at Ashtian | Ahmadi M.T.,University of Technology Malaysia | Abd Manaf A.,Universiti Sains Malaysia
Microelectronics Reliability | Year: 2011

Length of saturation region (LVSR) as an important parameter in nanoscale devices, which controls the drain breakdown voltage is in our focus. This paper presents three models for surface potential, surface electric field and LVSR in double-gate Graphene nanoribbon transistors. The Poisson equation is used to derive surface potential, lateral electric field and LVSR. Using the proposed models, the effect of several parameters such as drain-source voltage, oxide thickness, doping concentration and channel length on the LVSR is studied. © 2011 Elsevier Ltd. All rights reserved. Source


Ghadiry M.H.,Islamic Azad University of Arak | A'Ain A.K.,University of Technology Malaysia | Nadi S. M.,Islamic Azad University at Ashtian
Journal of Circuits, Systems and Computers | Year: 2011

This paper, presents a new full-swing low power high performance full adder circuit in CMOS technology. It benefits from a full swing XOR-XNOR module with no feedback transistors, which decreases delay and power consumption. In addition, high driving capability of COUT module and low PDP design of SUM module contribute to more PDP reduction in cascaded mode. In order to have accurate analysis, the new circuit along with several well-known full adders from literature have been modeled and compared with CADENCE. Comparison consists of power consumption, performance, PDP, and area. Results show that there are improvements in both power consumption and performance. This design trades area with low PDP. © 2011 World Scientific Publishing Company. Source


Farahani H.F.,Islamic Azad University at Ashtian | Rashidi F.,Hormozgan University
International Review of Electrical Engineering | Year: 2010

One of the most important problems in power electronic, especially inverters, is its switching. The amplitude of the harmonics can be reduced by using of multilevel inverters. So it leads to decrease of output current total harmonic distortion (THD). In the multilevel current source (MLCSI) the entire harmonics cannot be removed and some of them can be appeared in the output current. This paper presents a novel method in which combination of chops and short circuit pulses are positioned in such a way that lower order harmonics are eliminated selectively besides current magnitude modulation with minimum switching frequency. Generalized equations which show the relationship of various PWM-SHEM parameters to the position of short circuit pulses and the number of chops per 360° are provided and discussed in details. To verify proposed method, a sample multilevel current source inverter has been designed and simulated in PSPICE. © 2010 Praise Worthy Prize S.r.l. - All rights reserved. Source


Ghadiry M.,Islamic Azad University of Arak | Nadi M.,Islamic Azad University at Ashtian | A'Ain A.K.,University of Technology Malaysia
Circuits, Systems, and Signal Processing | Year: 2013

This paper presents a new 8-bit adder circuit, called discrepant low PDP 8-bit adder (DLPA) based on three new full adder cells, which have been designed based on requirements of different positions in each 8-bit adder circuit. In order to design the full adder cells, a new and general method has been proposed aiming to achieve full-swing output and low number of transistors. The proposed adder along with several state-of-the-art adders from the literature have been extensively analyzed and compared together. The results revealed that the power-delay product of DLPA is almost more than 20 % less than that of other compared circuits. © 2012 Springer Science+Business Media, LLC. Source


Heydari M.M.,Islamic Azad University | Heydari M.,Islamic Azad University at Ashtian
Archives of Agronomy and Soil Science | Year: 2014

The Penman-Monteith (FAO-56 PM) equation is suggested as the standard method for estimating evapotranspiration (ET0) by the International Irrigation and Drainage Committee and Food and Agriculture Organization (FAO). On the other hand, the Hargreaves-Samani (HS) equation is an alternative method compared with the FAO-56 PM equation. In the present study, the original coefficient C of the HS equation is calibrated based on the FAO-56 PM equation for estimating the reference ET0 from 15 meteorological stations in central Iran (about 170,000 km2) under semiarid and arid conditions. After calibration, the new values for C are ranged from 0.0018 to 0.0037. The mean bias error (MBE), the root mean square error (RMSE), and the ratio of average estimations of ET0 (R) values for all stations are ranged from 0.12 to 5.38, -5.35 to 1.15 mm d-1 and 0.64 to 1.28 for the HS equation and from 0.12 to 2.48, -2.2 to 0.60 mm d-1, and 1.00 to 1.05 for the calibrated Hargreaves-Samani equation (CHS), respectively. Results indicate that the average RMSE and MBE values are decreased by 40% and 66%, respectively. Relationships for calibrating the C coefficient on the basis of annual average of daily temperature range (ΔT) and wind speed (V) are proposed, calibrated, and validated. Hence, the CHS equation can be used for ET0 estimates with acceptable accuracy instead of the FAO-56 PM method. © 2013 © Taylor & Francis. Source

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