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Maurer M.,Albert Ludwigs University of Freiburg | Northemann T.,Albert Ludwigs University of Freiburg | Manoli Y.,Albert Ludwigs University of Freiburg | Manoli Y.,Institute of Micromachining and Information Technology
Procedia Engineering | Year: 2011

This paper presents a novel quadrature compensation scheme for vibratory rate gyroscopes in closed-loop electromechanical sigma-delta-modulators (ΣΔM). The proposed technique is able to detect and compensate quadrature errors beyond the full-scale limits of the ΣΔM with a minimal analog hardware effort. The quadrature detection is based on a pure digital pattern recognition algorithm, the quadrature compensation is done using DC bias voltages. An appropriate quadrature compensation is reached within a few iterations of the proposed algorithm. © 2011 Published by Elsevier Ltd. Source


Hehn T.,Albert Ludwigs University of Freiburg | Hagedorn F.,Albert Ludwigs University of Freiburg | Maurath D.,Nanyang Technological University | Marinkovic D.,Texas Instruments | And 4 more authors.
IEEE Journal of Solid-State Circuits | Year: 2012

This paper presents a fully autonomous, adaptive pulsed synchronous charge extractor (PSCE) circuit optimized for piezoelectric harvesters (PEHs) which have a wide output voltage range 1.3-20 V. The PSCE chip fabricated in a 0.35 m CMOS process is supplied exclusively by the buffer capacitor where the harvested energy is stored in. Due to the low power consumption, the chip can handle a minimum PEH output power of 5.7 μW. The system performs a startup from an uncharged buffer capacitor and operates in the adaptive mode at storage buffer voltages from 1.4 V to 5 V. By reducing the series resistance losses, the implementation of an improved switching technique increases the extracted power by up to 20% compared to the formerly presented Synchronous Electric Charge Extraction (SECE) technique and enables the chip efficiency to reach values of up to 85%. Compared to a low-voltage-drop passive full-wave rectifier, the PSCE chip increases the extracted power to 123% when the PEH is driven at resonance and to 206% at off-resonance. © 2012 IEEE. Source


Goeppert J.,Albert Ludwigs University of Freiburg | Manoli Y.,Albert Ludwigs University of Freiburg | Manoli Y.,Institute of Micromachining and Information Technology
European Solid-State Circuits Conference | Year: 2015

This paper presents an inductive DC-DC boost converter for energy harvesting using a thermoelectric generator with a minimum start-up voltage of 70 mV and a regulated output voltage of 1.25 V. With a typical generator resistance of 40 ω an output power of 17μW can be provided, which translates to an end-to-end efficiency of 58%. The converter employs Schmitt-Trigger logic start-up control circuitry and an ultra-low voltage charge pump using modified Schmitt-Trigger driving circuits optimized for driving capacitive loads. Together with a novel ultra-low leakage power switch and the required control scheme, this enables, to the authors knowledge, the lowest minimum voltage with fully integrated start-up. © 2015 IEEE. Source


Ding C.,Albert Ludwigs University of Freiburg | Manoli Y.,Albert Ludwigs University of Freiburg | Manoli Y.,Institute of Micromachining and Information Technology | Keller M.,Albert Ludwigs University of Freiburg
European Solid-State Circuits Conference | Year: 2015

A third-order continuous-time Delta-Sigma modulator in a 130 nm CMOS technology is presented. It features a 3-bit quantizer with an intrinsic excess loop delay compensation for half a clock cycle. The compensation is performed by means of adapting the reference voltages of the comparators on a sampling-to-sampling base, thus overcoming a power consuming summation of signals in front of the quantizer. Occupying merely 0.086mm2, the modulator achieves 66.4 dB SNDR and 74.6 dB DR in a 20 MHz bandwidth using a 640 MHz clock frequency. The power consumption equals 5.1 mW drawn from a 1.2 V supply voltage, which yields a state-of-the-art Walden figure of merit FOMW of 74.7 fJ/conv-step. © 2015 IEEE. Source


Kuhl M.,Albert Ludwigs University of Freiburg | Manoli Y.,Albert Ludwigs University of Freiburg | Manoli Y.,Institute of Micromachining and Information Technology
European Solid-State Circuits Conference | Year: 2015

This work presents an area-efficient fully-differential 2-stage amplifier as analog pre-amplifier for active neural recording probes. It features an architecture-switching-scheme to reduce the overhead of unused feedback elements in variable-bandwidth-systems, as well as a double-differential self-defining common mode feedback to minimize the biasing overhead. Its area including all feedback elements measures 9,977 μm2, which is more than 2x smaller than previously published neural readout bandpass LNAs. It offers a switchable lower (1 or 140 Hz) and tunable upper (0.24-49 kHz) cut-off frequency with a gain of 26-32 dB and an input noise down to 11.9 μVrms. The LNA consumes 0.1-8.2 μA at 1.8 V and was implemented in a 0.18 μm CMOS technology. © 2015 IEEE. Source

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