Institute of Microelectronics, Singapore
Singapore, Singapore
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Che F.X.,Institute of Microelectronics, Singapore
IEEE Transactions on Device and Materials Reliability | Year: 2017

In this paper, a method of design-for-reliability for the advanced electronic package under temperature cycling (TC) condition is demonstrated, including material characterization, reliability test, finite element analysis (FEA), and fatigue life model development. Tensile tests are conducted for Sn.1.0Ag.0.5Cu.0.02Ni (SAC105Ni0.02) solder alloy at four stain rates of 10-5, 10-4, 10-3, and 10-2 and four test temperatures of-35 ° C, 25 ° C, 75 ° C, and 125 ° C to develop temperature- A nd strain rate-dependent material models. Tensile creep tests are carried out at various temperatures and stress levels to study creep behavior. TC reliability test is conducted for ball grid array package with SAC105Ni0.02 solder joints. Thermal fatigue lives are obtained from TC test with different failure rates. FEA simulation is carried out for each package using the developed mechanical properties and creep model of the solder. Fatigue life models with different failure rates are proposed for the SAC105Ni0.02 solder by combining simulation results and experimental data. Fatigue resistance of the SAC105Ni0.02 solder is comparable with that of high Ag content SAC solders. © 2017 IEEE.

Lee J.,Institute of Microelectronics, Singapore | Cho S.,KAIST
IEEE Journal of Solid-State Circuits | Year: 2012

This paper presents a trim-free low-voltage and low-power CMOS current reference which achieves high current stability to temperature variation. In order to achieve process-insensitive temperature compensation, the proposed circuit employs ratio between the process-independent temperature coefficients of resistor and compensation voltage. The proposed current reference is implemented in 0.18-μm CMOS technology and consumes 1.4 μW from a 1-V supply. It achieves temperature coefficient of 24.9 ppm/°C with 0 °C to 100 °C of temperature variation without trimming, which is the lowest among the recently reported CMOS current references. © 1966-2012 IEEE.

Chee J.,Institute of Microelectronics, Singapore | Zhu S.,Institute of Microelectronics, Singapore | Lo G.Q.,Institute of Microelectronics, Singapore
Optics Express | Year: 2012

We design and experimentally demonstrate an ultrashort integrated polarization splitter on silicon-on-insulator (SOI) platform. Our polarization splitter uses a hybrid plasmonic waveguide as the middle waveguide in a three-core arrangement to achieve large birefringence, allowing only transverse-magnetic (TM) polarized light to directionally couple to the cross port of the directional coupler. Finite-difference timedomain (FDTD) and eigenmode expansive (EME) calculations show that the splitter can achieve an extinction ratio of greater than 15 dB with less than 0.5 dB insertion losses. The polarization splitter was fabricated on SOI platform using standard complementary metal-oxide-semiconductor (CMOS) technology and measured at telecommunications wavelengths. Extinction ratios of 12.3 dB and 13.9 dB for the transverse-electric (TE) and TM polarizations were obtained, together with insertion losses of 2.8 dB and 6.0 dB. © 2012 Optical Society of America.

Zhu S.,Institute of Microelectronics, Singapore | Lo G.Q.,Institute of Microelectronics, Singapore | Kwong D.L.,Institute of Microelectronics, Singapore
Optics Express | Year: 2012

Ultracompact Cu-capped Si hybrid plasmonic waveguide-ring resonators (WRRs) with ring radii of 1.09-2.59 μm are fabricated on silicon on insulator substrates using standard complementary metal-oxidesemiconductor technology and characterized over the telecom wavelength range of 1.52-1.62 μm. The dependence of the spectral characteristics on the key structural parameters such as the Si core width, the ring radius, the separation gap between the ring and bus waveguides, and the ring configuration is systematically studied. A WRR with 2.59-μm radius and 0.250-μm nominal gap exhibits good performances such as normalized insertion loss of ̃0.1 dB, extinction ratio of ̃12.8 dB, free spectral range of ̃47 nm, and quality factor of ̃275. The resonance wavelength is redshifted by ̃4.6 nm and an extinction ratio of ̃7.5 dB is achieved with temperature increasing from 27 to 82°C. The corresponding effective thermo-optical coefficient (dng/dT) is estimated to be ̃1.6 × 10-4 K-1, which is contributed by the thermo-optical effect of both the Si core and the Cu cap, as revealed by numerical simulations. Combined with the compact size and the high thermal conductivity of Cu, various effective thermo-optical devices based on these Cu-capped plasmonic WRRs could be realized for seamless integration in existing Si electronic-photonic integrated circuits. © 2012 Optical Society of America.

Neuzil P.,Institute of Microelectronics, Singapore | Wong C.C.,Institute of Microelectronics, Singapore | Wong C.C.,Nanyang Technological University | Reboud J.,Institute of Microelectronics, Singapore
Nano Letters | Year: 2010

Herein we demonstrate giant piezoresistance in silicon nanowires (NWs) by the modulation of an electric field-induced with an external electrical bias. Positive bias for a p-type device (negative for an n-type) partially depleted the NWs forming a pinch-off region, which resembled a funnel through which the electrical current squeezed. This region determined the total current flowing through the NWs. In this report, we combined the electrical biasing with the application of mechanical stress, which impacts the charge carriers' concentration, to achieve an electrically controlled giant piezoresistance in nanowires. This phenomenon was used to create a stress-gated field-effect transistor, exhibiting a maximum gauge factor of 5000, 2 orders of magnitude increase over bulk value. Giant piezoresistance can be tailored to create highly sensitive mechanical sensors operating in a discrete mode such as nanoelectromechanical switches. © 2010 American Chemical Society.

Arya S.K.,Institute of Microelectronics, Singapore | Lim B.,Agency for Science, Technology and Research Singapore | Rahman A.R.A.,Institute of Microelectronics, Singapore
Lab on a Chip - Miniaturisation for Chemistry and Biology | Year: 2013

Circulating Tumor Cells (CTCs) are shed from primary or secondary tumors into blood circulation. Accessing and analyzing these cells provides a non-invasive alternative to tissue biopsy. CTCs are estimated to be as few as 1 cell among a few million WBCs and few billion RBCs in 1 ml of patient blood and are rarely found in healthy individuals. CTCs are FDA approved for prognosis of the major cancers, namely, Breast, Colon and Prostate. Currently, more than 400 clinical trials are ongoing to establish their clinical significance beyond prognosis, such as, therapy selection and companion diagnostics. Understanding the clinical relevance of CTCs typically involves isolation, detection and molecular characterization of cells, ideally at single cell level. The need for highly reliable, standardized and robust methodologies for isolating and analyzing CTCs has been widely expressed by clinical thought leaders. In the last decade, numerous academic and commercial technology platforms for isolation and analysis of CTCs have been reported. A recent market report highlighted the presence of more than 100 companies offering products and services related to CTCs. This review aims to capture the state of the art and examines the technical merits and limitations of contemporary technologies for clinical use. This journal is © The Royal Society of Chemistry.

Zhu S.,Institute of Microelectronics, Singapore | Lo G.Q.,Institute of Microelectronics, Singapore | Kwong D.L.,Institute of Microelectronics, Singapore
Optics Express | Year: 2014

An ultra-compact electro-absorption (EA) modulator operating around 1.55-μm telecom wavelengths is proposed and theoretically investigated. The modulator is comprised of a stack of TiN/HfO2/ITO/Cu conformally deposited on a single-mode stripe waveguide to form a hybrid plasmonic waveguide (HPW). Since the thin ITO layer can behave as a semiconductor, the stack itself forms a MOS capacitor. A voltage is applied between the Cu and TiN layers to change the electron concentration of ITO (NITO), which in turn changes its permittivity as well as the propagation loss of HPW. For a HPW comprised of a Cu/3-nm-ITO/5-nm-HfO2/5-nm-TiN stack on a 400-nm × 340-nm-Si stripe waveguide, the propagation loss for the 1.55-μm TE (TM) mode increases from 1.6 (1.4) to 23.2 (23.9) dB/μm when the average NITO in the 3-nm ITO layer increases from 2 × 1020 to 7 × 1020 cm-3, which is achieved by varying the voltage from -2 to 4 V if the initial NITO is 3.5 × 10 20 cm-3. As a result, a 1-μm-long EA modulator inserted in the 400-nm × 340-nm-Si stripe waveguide exhibits insertion loss of 2.9 (3.2) dB and modulation depth of 19.9 (15.2) dB for the TE (TM) mode. The modulation speed is ∼11 GHz, limited by the RC delay, and the energy consumption is ∼0.4 pJ/bit. The stack can also be deposited on a low-index-contrast waveguide such as Si3N4. For example, a 4-μm-long EA modulator inserted in an 800-nm × 600-nm-Si 3N4 stripe waveguide exhibits insertion loss of 6.3 (3.5) dB and modulation depth of 16.5 (15.8) dB for the TE (TM) mode. The influences of the ITO, TiN, HfO2 layers and the beneath dielectric core, as well as the processing tolerance, on the performance of the proposed EA modulator are systematically investigated. © 2014 Optical Society of America.

Zhu S.,Institute of Microelectronics, Singapore | Lo G.-Q.,Institute of Microelectronics, Singapore
Journal of Lightwave Technology | Year: 2016

Vertically stacked hydrogenated amorphous silicon (a-Si:H) and aluminum nitride (AlN) photonic circuits are fabricated on bulk silicon using complementary metal-oxide semiconductor back-end-of-line-compatible technology. The 0.5 μm × 0.22 μm a-Si:H and 1 μm × 0.4 μm AlN channel waveguides exhibit relatively low propagation losses of ∼3.8 and ∼1.4 dB/cm at 1550-nm telecom wavelengths, respectively, thus enabling the realization of various high-performance photonic devices on these two layers, such as multimode interference power splitters, waveguide ring resonators, arrayed-waveguide gratings, etc. In particular, the a-Si:H layer is suitable for ultra-compact thermo-optic (TO) devices because of its large refractive index of ∼3.5 and large TO coefficient (TOC) of ∼2.60 × 10-4 K-1, whereas the AlN layer is suitable for large-size temperature-insensitive devices because of its relatively small refractive index of ∼2.0 and small TOC of ∼3.56 × 10-5 K-1. A cascade directional coupler structure is proposed for connection between these two layers, which provides coupling efficiency of ∼ -1.0 dB, as estimated from numerical simulations. The feasibility of stacking different photonic layers on bulk Si paves the way to realize complex 3-D photonic circuits on chip which are not possible in the conventional single-layer configuration. © 1983-2012 IEEE.

Zhu S.,Institute of Microelectronics, Singapore | Lo G.Q.,Institute of Microelectronics, Singapore | Kwong D.L.,Institute of Microelectronics, Singapore
Optics Express | Year: 2012

We report systematic results on the development of horizontal Cu-SiO 2-Si-SiO2-Cu nanoplasmonic waveguide components operating at 1550-nm telecom wavelengths, including straight waveguides, sharp 90° bends, power splitters, and Mach-Zehnder interferometers (MZIs). Owing to the relatively low loss for propagating (∼0.3 dB/ím) and for 90° sharply bending (∼0.73 dB/turn), various ultracompact power splitters and MZIs are experimentally realized on a silicon-on-insulator (SOI) platform using standard CMOS technology. The demonstrated splitters exhibit a relatively low excess loss and the MZIs exhibit good performance such as high extinction ratio of ∼18 dB and low normalized insertion loss of ∼1.7 dB. The experimental results of these devices agree well with those predicted from numerical simulations with suitable Cu permittivity data. © 2012 Optical Society of America.

STMicroelectronics and Institute of Microelectronics, Singapore | Date: 2010-02-26

Switches that are actuated through exposure to a magnetic field are described. Such switches include conductive portions that are electrically separate from one another when in an open switch configuration. A mobile element of a switch includes one or more anchoring members that are in electrical contact with one of the conductive portions. The mobile element also has a beam that is attached to the one or more anchoring members. The beam can be attached to the one or more anchoring members by flexures. In some cases, the beam includes a plurality of strips. The beam has an end portion that is configured to move toward the other conductive portion when exposed to an external force, such as a magnetic field. When the mobile element electrically contacts the other conductive portion of the substrate, an electrical pathway is established between the conductive portions, giving rise to a closed switch configuration. Various configurations of anchoring members may significantly decrease initial upward beam deformation upon manufacture of the mobile element, resulting in an increased sensitivity upon exposure to a magnetic field. Methods for manufacturing switches that exhibit increased sensitivity to magnetic fields are also disclosed. Switches described can be formed using semiconductor manufacturing techniques. Methods described also include forming a beam that is attached to one or more anchoring members where an end portion of the beam moves in a substantially downward direction upon exposure to a magnetic field of sufficient intensity.

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