Lyberis S.,Institute of Computer Science ICS |
Pratikakis P.,Institute of Computer Science ICS |
Nikolopoulos D.S.,Institute of Computer Science ICS |
Nikolopoulos D.S.,Queen's University of Belfast |
And 3 more authors.
ACM SIGPLAN Notices | Year: 2012
Constantly increasing hardware parallelism poses more and more challenges to programmers and language designers. One approach to harness the massive parallelism is to move to task-based programming models that rely on runtime systems for dependency analysis and scheduling. Such models generally benefit from the existence of a global address space. This paper presents the parallel memory allocator of the Myrmics runtime system, in which multiple allocator instances organized in a tree hierarchy cooperate to implement a global address space with dynamic region support on distributed memory machines. The Myrmics hierarchical memory allocator is step towards improved productivity and performance in parallel programming. Productivity is improved through the use of dynamic regions in a global address space, which provide a convenient shared memory abstraction for dynamic and irregular data structures. Performance is improved through scaling on many-core systems without system-wide cache coherency. We evaluate the stand-alone allocator on an MPI-based x86 cluster and find that it scales well for up to 512 worker cores, while it can outperform Unified Parallel C by a factor of 3.7-10.7×.
Pediaditis M.,Institute of Computer Science ICS |
Tsiknakis M.,Institute of Computer Science ICS |
Koumakis L.,Institute of Computer Science ICS |
Karachaliou M.,University of Crete |
And 2 more authors.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBS | Year: 2012
In order to diagnose epilepsy, neurologists rely on their experience, performing an equal assessment of the electroencephalogram and the clinical image. Since misdiagnosis reaches a rate of 30% and more than one-third of all epilepsies are poorly understood, a need for leveraging diagnostic precision is obvious. With the aim at enhancing the clinical image assessment procedure, this paper evaluates the suitability of certain facial expression features for detecting and quantifying absence seizures. These features are extracted by means of time-varying signal analysis from signals that are gained by applying computer vision techniques, such as face detection, dense optical flow computation and averaging background subtraction. For the evaluation, video sequences of four patients with absence seizures are used. The classification performance of a C4.5 decision tree shows accuracies of up to 99.96% with a worst percentage of incorrectly classified instances of 0.14%. © 2012 IEEE.
Pediaditis M.,Institute of Computer Science ICS |
Tsiknakis M.,FORTH |
Tsiknakis M.,Technological Educational Institute of Crete |
Bologna V.,FORTH |
Vorgia P.,University of Crete
10th International Workshop on Biomedical Engineering, BioEng 2011 | Year: 2011
The assessment of an epileptic patient's clinical image during seizure manifestations is equally important for a correct disease diagnosis as are the findings in the electroencephalogram (EEG). So far, the EEG has been studied extensively and these efforts have brought significant benefits in epileptology by providing well defined patterns, quantitatively describing epileptic events. The same cannot be stated regarding the acquisition of quantifiable descriptions of a patient's clinical image. This paper introduces and evaluates vision-based approaches for the automatic extraction of quantitative features describing facial motion in the domain of epilepsy. © 2011 IEEE.
Papagiannis A.,Institute of Computer Science ICS |
Nikolopoulos D.S.,Foundation for Research and Technology Hellas
3rd Many-Core Applications Research Community Symposium, MARC 2011 | Year: 2011
Many-core processors, due to their complexity and diversity, necessitate high-productivity, domain-specific approaches to parallel programming. These approaches should hide architectural details and low-level parallelization constructs, while enabling scalability and performance portability. This paper presents a scalable implementation of MapReduce, a runtime system used widely by domain-specific languages for large-scale data processing, on the Intel SCC. We address the scalability bottlenecks of MapReduce with data partitioning, combining and sorting algorithms that we customize for the SCC network on-chip architecture. We achieve linear or superlinear speedups for representative MapReduce workloads with data sets that fit on a single SCC node. We also show that the SCC node outperforms the IBM Cell QS22 Blade, when the latter uses the fastest implementation of MapReduce available for the Cell processor.
Gonzalez-Ferez P.,Institute of Computer Science ICS |
Gonzalez-Ferez P.,University of Murcia |
Bilas A.,Institute of Computer Science ICS |
Bilas A.,University of Crete
IEEE Symposium on Mass Storage Systems and Technologies | Year: 2015
Small I/O requests are important for a large number of modern workloads in the data center. Traditionally, storage systems have been able to achieve low I/O rates for small I/O operations because of hard disk drive (HDD) limitations that are capable of about 100-150 IOPS (I/O operations per second) per spindle. Therefore, the host CPU processing capacity and network link throughput have been relatively abundant for providing these low rates. With new storage device technologies, such as NAND Flash Solid State Drives (SSDs) and non-volatile memory (NVM), it is becoming common to design storage systems that are able to support millions of small IOPS. At these rates, however, both server CPU and network protocol are emerging as the main bottlenecks for achieving large rates for small I/O requests. Most storage systems in datacenters deliver I/O operations over some network protocol. Although there has been extensive work in low-latency and high-throughput networks, such as Infiniband, Ethernet has dominated the datacenter. In this work we examine how networked storage protocols over raw Ethernet can achieve low, host CPU overhead and increase network link efficiency for small I/O requests. We first analyze in detail the latency and overhead of a networked storage protocol directly over Ethernet and we point out the main inefficiencies. Then, we examine how storage protocols can take advantage of context switch elimination and adaptive batching to reduce CPU and network overhead. Our results show that raw Ethernet is appropriate for supporting fast storage systems. For 4kB requests we reduce server CPU overhead by up to 45%, we improve link utilization by up to 56%, achieving more than 88% of the theoretical link throughput. Effectively, our techniques serve 56% more I/O operations over a 10Gbits/s link than a baseline protocol that does not include our optimizations at the same CPU utilization. Overall, to the best of our knowledge, this is the first work to present a system that is able to achieve 14μs host CPU overhead on both initiator and target for small networked I/Os over raw Ethernet without hardware support. In addition, our approach is able to achieve 287K 4kB IOPS out of the 315K IOPS that are theoretically possible over a 1.2GBytes/s link. © 2015 IEEE.
Ribeiro M.M.,University of Sao Paulo |
Wassermann R.,University of Sao Paulo |
Flouris G.,Institute of Computer Science ICS |
Antoniou G.,University of Huddersfield
Artificial Intelligence | Year: 2013
The operation of contraction (referring to the removal of knowledge from a knowledge base) has been extensively studied in the research field of belief change, and different postulates (e.g., the AGM postulates with recovery, or relevance) have been proposed, as well as several constructions (e.g., partial meet) that allow the definition of contraction operators satisfying said postulates. Most of the related work has focused on classical logics, i.e., logics that satisfy certain intuitive assumptions; in such logics, several nice properties and equivalences related to the above postulates and constructions have been shown to hold. Unfortunately, previous work has shown that the postulatesÊ applicability and the related results generally fail for non-classical logics. Motivated by the fact that non-classical logics (like Description Logics or Horn logic) are increasingly being used in various applications, we study contraction for all monotonic logics, classical or not. In particular, we identify several sufficient conditions for the various postulates to be applicable, and show that, in practice, relevance is a more suitable (i.e., applicable) minimality criterion than recovery for non-classical logics. In addition, we revisit some important related results from the classical belief change literature and study conditions sufficient for them to hold for non-classical logics; the corresponding results for classical logics emerge as corollaries of our more general results. Our work is another step towards the aim of exploiting the rich belief change literature for addressing the evolution problem in a larger class of logics. © 2013 Elsevier B.V.
Pediaditis M.,Institute of Computer Science ICS
Conference proceedings : ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Conference | Year: 2012
In order to diagnose epilepsy, neurologists rely on their experience, performing an equal assessment of the electroencephalogram and the clinical image. Since misdiagnosis reaches a rate of 30% and more than one-third of all epilepsies are poorly understood, a need for leveraging diagnostic precision is obvious. With the aim at enhancing the clinical image assessment procedure, this paper evaluates the suitability of certain facial expression features for detecting and quantifying absence seizures. These features are extracted by means of time-varying signal analysis from signals that are gained by applying computer vision techniques, such as face detection, dense optical flow computation and averaging background subtraction. For the evaluation, video sequences of four patients with absence seizures are used. The classification performance of a C4.5 decision tree shows accuracies of up to 99.96% with a worst percentage of incorrectly classified instances of 0.14%.