Livingston, United Kingdom
Livingston, United Kingdom

Time filter

Source Type

Chaehoi A.,Institute for System Level Integration | Begbie M.,Institute for System Level Integration | Weiland D.,Institute for System Level Integration | Chew Z.J.,University of Swansea | Li L.,University of Swansea
Microsystem Technologies | Year: 2012

DC/DC converters are widely used in consumer electronic devices where usually a single power source is available while the electronic board of the device requires different voltage levels in order to power-up different block functions. In this paper we present the design of a MEMS single-input multi-output voltage level shifter. The lowvoltage to high-voltage conversion is based on the electrostatic transduction of variable capacitors built using interdigitated comb fingers. A 1 mm2 MEMS prototype has been designed and fabricated using the SOIMUMPs process. In this study we present the co-design and co-simulation of the whole system (the MEMS device and its dedicated charge-pump-circuit) in a single EDA environment through MEMS+ (a Coventorware® tool that allows the co-simulation of MEMS and electronics in the Cadence Analog Design Environment). We present analytical, FEM and MEMS+ models of the multi-output DC-DC converter and show that all our models converge towards the experimental results. © Springer-Verlag 2012.


Chaehoi A.,Institute for System Level Integration | O'Connell D.,Institute for System Level Integration | Weiland D.,Institute for System Level Integration | Adamson R.,Institute for System Level Integration | And 4 more authors.
Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010 | Year: 2010

This paper presents the development of a monolithic CMOS-MEMS platform under the iDesign and SemeMEMS projects with the aim of jointly providing an open access "one-stop-shop" design and prototyping facility for integrated CMOS-MEMS. This work addresses the implementation of a 3-axis accelerometer and a pressure sensor using Semefab's in-house 2-poly 1-metal CMOS process on a 380/4/15μm SOI wafer; the membrane and the proof mass being micromachined using double-sided DRIE. This monolithic approach promises, in high volume production and using low complexity processes, a dramatic cost reduction over hybrid sensors. Furthermore, the embedded signal conditioning and the low-noise level in polysilicon gauges enables high performance to be achieved by implementing dedicated on-chip amplification and filtering circuitry.


Xu Z.,Lancaster University | Richardson A.,Lancaster University | Begbie M.,Institute for System Level Integration | Wang C.H.,Heriot - Watt University
Proceedings - 2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop, IMS3TW 2011 | Year: 2011

Fault-tolerance is an important design requirement in critical sensor applications. It is conventionally achieved by using redundant components, which increases system's size, cost and complexity, that are often sacrificed or comprised due to associated limitations. This paper proposes a novel solution to achieve sensor fault-tolerance at the system level instead of the usual approach that targets the component level. The architecture consists of multifunctional sensors which are used to replace conventional single mode sensors, and a data fusion algorithm which provides online test and fault-tolerance. This method has the potential to significantly increase system reliability and supports a reduction in the overheads inherent with the use of redundancy in fault-tolerant systems. A MEMS humidity/pressure sensor has been designed as an example to support the method. The sensor has simple structure, good linearity and sensitivity, and the potential of further integrating a temperature function. © 2011 IEEE.


Xu Z.,Lancaster University | Richardson A.,Lancaster University | Koltsov D.,BREC Solutions | Li L.,Institute for System Level Integration | And 2 more authors.
2010 15th IEEE European Test Symposium, ETS'10 | Year: 2010

Health and usage monitoring (HUMS) as a technique for online test, diagnosis or prognosis of structures and systems has evolved as a key technology for future critical systems. The application of HOIS technology requires a portfolio of reliable miniaturized sensors, capable of delivering "intelligence" on the internal and external environment of a system or structure. This paper proposes a fault tolerant sensor architecture and demonstrates the feasibility of realising this architecture through the design of a dual mode humidity/pressure MEMS sensor with an integrated temperature function. The sensor has a simple structure, good linearity and sensitivity, and the potential for implementation of built-in Self-test features. We also propose a re-configurable sensor network based on the multi-functional sensor concept that supports both normal operational and fail safe modes. The architecture has the potential to significantly increase system reliability and supports a reduction in the number of sensors required in future HUMS devices. The technique has potential in a wide range of applications, especially within wireless sensor networks. © 2010 IEEE.


Cornez D.,University of West of Scotland | Elgoyhen J.,University of West of Scotland | Hutson D.,University of West of Scotland | Percier C.,University of West of Scotland | And 4 more authors.
Journal of Electroceramics | Year: 2011

Aluminium nitride (AlN) is a thin film piezoelectric material having excellent potential for integration with microelectronic systems. We have investigated flexural modes of Si 3N 4 membrane structures with and without an AlN active layer. AlN films typically 3 μm thick were deposited by RF sputtering. Mechanical excitation was provided acoustically by sweeping the excitation frequency of a 1 MHz air-coupled ultrasonic transducer. Mode shapes were verified by scanning laser vibrometry up to the [3,3] mode, in the frequency range 100 kHz to 1 MHz. Resonant frequencies were identified at the predicted values provided the tension in the layers could be estimated. For a membrane structure incorporating an AlN layer, acoustic and electrical excitation of flexural modes was confirmed by displacement measurements using laser vibrometry and resonant frequencies were compared with analytical calculations. © 2011 Springer Science+Business Media, LLC.


Moadeli M.,University of Glasgow | Shahrabi A.,Glasgow Caledonian University | Vanderbauwhede W.,University of Glasgow | Maji P.,Institute for System Level Integration
Journal of Systems Architecture | Year: 2010

The Spidergon Network-on-Chip (NoC) was proposed to address the demand for a fixed and optimized communication infrastructure for cost-effective multi-processor Systems-on-Chip (MPSoC) development. To deal with the increasing diversity in quality of service requirements of SoC applications, the performance of this architecture needs to be improved. Virtual channels have traditionally been employed to enhance the performance of the interconnect networks. In this paper, we present analytical models to evaluate the message latency and network throughput in the Spidergon NoC and investigate the effect of employing virtual channels. Results obtained through simulation experiments show that the model exhibits a good degree of accuracy in predicting average message latency under various working conditions. Moreover an FPGA implementation of the Spidergon has been developed to provide an accurate analysis of the cost of employing virtual channels in this architecture. © 2009 Elsevier B.V. All rights reserved.


Ferguson P.D.,Institute for System Level Integration | Efthymiou A.,University of Edinburgh | Arslan T.,University of Edinburgh | Hume D.,Thales Optronics Ltd.
Proceedings - 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010 | Year: 2010

This paper introduces a novel synchronous to asynchronous logic conversion tool targeted specifically for a synchronous field programmable gate array (FPGA). This tool augments the synchronous FPGA design flow and removes the clock network to implement an asynchronous control network in its place. We evaluate the timing performance benefits of the methods used to implement the asynchronous control network on synchronous FPGA fabric. Industrial video processing circuits are used to demonstrate the iterative timing improvements the tool makes to asynchronous control networks in each circuit. The targeted design constraints used in the tool are intended to improve the robustness and predictability of the placed circuits. This allows the timing benefits of asynchronous bundled data circuits easier to achieve, making asynchronous circuits a viable design option on modern FPGAs. © 2010 IEEE.


Xu Z.,Lancaster University | Koltsov D.,BREC Solutions | Richardson A.,Lancaster University | Li L.,Institute for System Level Integration | Begbie M.,Institute for System Level Integration
2010 Prognostics and System Health Management Conference, PHM '10 | Year: 2010

Health and usage monitoring as a technique for online test, diagnosis or prognosis of structures and systems has evolved as a key technology for future critical systems. The technology, often refereed to as HUMS is usually based around sensors that must be more reliable than the system or structure they are monitoring. This paper proposes a fault tolerant sensor architecture and demonstrates the feasibility of realising this architecture through the design of a dual mode humidity/pressure MEMS sensor with an integrated temperature function. The sensor has a simple structure, good linearity and sensitivity, and the potential for implementation of built-inself-test features. We also propose a re-configurable sensor network based on the multi-functional sensor concept that supports both Normal Operational and Fail Safe Modes. The architecture has the potential to significantly increase system reliability and supports a reduction in the number of sensors required in future HUMS devices. The technique has potential in a wide range of applications, especially within wireless sensor networks. © 2010 IEEE.


Aragon-Camarasa G.,University of Glasgow | Fattah H.,Institute for System Level Integration | Paul Siebert J.,University of Glasgow
Robotics and Autonomous Systems | Year: 2010

This paper presents the results of an investigation and pilot study into an active binocular vision system that combines binocular vergence, object recognition and attention control in a unified framework. The prototype developed is capable of identifying, targeting, verging on and recognising objects in a cluttered scene without the need for calibration or other knowledge of the camera geometry. This is achieved by implementing all image analysis in a symbolic space without creating explicit pixel-space maps. The system structure is based on the 'searchlight metaphor' of biological systems. We present results of an investigation that yield a maximum vergence error of ∼6.5 pixels, while ∼85% of known objects were recognised in five different cluttered scenes. Finally a 'stepping-stone' visual search strategy was demonstrated, taking a total of 40 saccades to find two known objects in the workspace, neither of which appeared simultaneously within the field of view resulting from any individual saccade. © 2009 Elsevier B.V.


Hernandez M.C.V.,University of Edinburgh | Wardlaw J.M.,University of Edinburgh | Murphy S.,Institute for System Level Integration
BIOSIGNALS 2010 - Proceedings of the 3rd International Conference on Bio-inpsired Systems and Signal Processing, Proceedings | Year: 2010

The effects of atrophy and diffusion of the boundary between grey and white matter, common in elder individuals, represents a difficult problem for segmentation, not observed in healthy younger adults. The aim of this study is to evaluate four well-known unsupervised clustering algorithms in brain tissue segmentation using MR scans with atrophies and lesions. The brain is segmented into 3 different types: white matter, grey matter and CSF. We used four MR sequences: T1W, T2W, T2*W and FLAIR to classify each voxel in the image. No spatial information was used. The algorithms tested were k-means, EM (Gaussian mixture), MVQ (minimum variance quantisation) and Mean Shift. The datasets were acquired from an aged cohort (> 70 years). The resulting segmentations were quantitatively compared to expertly collected ground truth on 12 datasets, using the Dice coefficient as an overlap measure. The classification algorithms could be ranked in the following order: MVQ, k;-means, EM and MeanShift from best to worst. The MVQ algorithm did best of all with over a .9 Dice overlap on CSF, and over .8 on white matter.

Loading Institute for System Level Integration collaborators
Loading Institute for System Level Integration collaborators