Institute for Microelectronics Stuttgart

Stuttgart, Germany

Institute for Microelectronics Stuttgart

Stuttgart, Germany
SEARCH FILTERS
Time filter
Source Type

Butschke J.,Institute for Microelectronics Stuttgart | Irmscher M.,Institute for Microelectronics Stuttgart | Koepernik C.,Institute for Microelectronics Stuttgart | Martens S.,Institute for Microelectronics Stuttgart | And 2 more authors.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2015

Targeting mass production of nanostructures, nanoimprint lithography (NIL) is one of the most cost-effective ways to do so. One of the most critical topics is the pattern quality of the imprint master template. Therefore the new Vistec SB4050 VSB e-beam writer has been evaluated regarding its capability for state-of-the-art NIL template and DOE making. Equipped with a new air bearing stage the tool can expose a wide variety of substrates including large and heavy ones. For 9035 substrates a placement accuracy of 9nm (3sigma) as well as an overlay accuracy of 7nm (3sigma) with a mean error below 2nm has been achieved. Targeting for minimum feature size, a resolution below 30nm has been achieved for both, dense lines and holes pattern even using CAR. In addition, 3D structuring capability has been proved by applying GenISys' Layout Beamer calibrated for an appropriate negative tone resist. Further investigation has been done on shot count optimization regarding circular holes respective pillars. Using a feature size dependent segmentation, writing time reduction could be achieved keeping the original feature shape. Besides screening of typical tool parameter an application driven evaluation has been done by fabricating different type of templates based on silicon and quartz. 2D and 3D features have been realized. Furthermore holograms have been fabricated and proved for their performance by optical measurements. © 2015 SPIE.


Gartner P.,Budapest University of Technology and Economics | Richter H.,Institute for Microelectronics Stuttgart
BEC 2010 - 2010 12th Biennial Baltic Electronics Conference, Proceedings of the 12th Biennial Baltic Electronics Conference | Year: 2010

The paper presents a new solution to achieve rail-to-rail common mode input voltage swing for CMOS operational amplifiers. The common mode input range of a MOS differential stage is limited by the threshold voltage of the input transistors. With a pair of complementary input stages the whole range from GND to VDD can be covered. Their drain currents are summed up but the resulting current as well as the DC voltage of the summing node drastically change when one of the input stages turns off near the power rails. The new method applies a built-in feedback loop with an auxiliary opamp for stabilizing the voltage at the summing node. This way a very stable operating point and ideal CMRR can be assured. With selected transistor aspect ratios nearly constant voltage gain can be achieved for the whole common mode input voltage range. ©2010 IEEE.


Zaki T.,University of Stuttgart | Zaki T.,Institute for Microelectronics Stuttgart | Scheinert S.,TU Ilmenau | Horselmann I.,TU Ilmenau | And 7 more authors.
IEEE Transactions on Electron Devices | Year: 2014

This paper presents analysis of the charge storage behavior in organic thin-film transistors (OTFTs) by means of admittance characterization, compact modeling, and 2-D device simulation. The measurements are performed for frequencies ranging from 100 Hz to 1 MHz and bias potentials from zero to-3 V on top-contact OTFTs that employ air-stable and high-mobility dinaphtho-thieno- thiophene as the organic semiconductor. It is demonstrated that the dependence of the intrinsic OTFT gate-source and gate-drain capacitances on the applied voltages agrees very well with Meyer's capacitance model. Furthermore, the impact of parasitic elements, including fringe current and contact impedance, is investigated. The parameters used for the simulation and modeling of all the dynamic characteristics correspond closely to those extracted from static measurements. Finally, the implications of the admittance measurements are also discussed relating to the OTFTs dynamic performance, particularly the cutoff frequency and the charge response time. © 2013 IEEE.


Fohn T.,University of Stuttgart | Hoppe N.,University of Stuttgart | Vogel W.,University of Stuttgart | Schmidt M.,University of Stuttgart | And 4 more authors.
Proceedings of the International Conference on Numerical Simulation of Optoelectronic Devices, NUSOD | Year: 2014

Spectral properties of silicon subwavelength grating waveguides are simulated in 3D with eigenmode expansion and the impact of the number of included modes is investigated. Simulation results are validated against measurements. © 2014 IEEE.


Hoppe N.,University of Stuttgart | Fohn T.,University of Stuttgart | Rosa M.F.,University of Stuttgart | Vogel W.,University of Stuttgart | And 5 more authors.
Proceedings of the International Conference on Numerical Simulation of Optoelectronic Devices, NUSOD | Year: 2015

A novel type of interferometer with an ultra-small footprint is presented. The functional principle is based on the excitation of the first and the second order modes in an integrated dual-mode strip waveguide. The light is coupled from a single mode fiber to the dual-mode waveguide by a conventional grating coupler followed by a taper. The difference in the mode propagation velocity leads to a phase difference between the fundamental mode and the second order mode. A proof of concept in the silicon on insulator technology shows promising extinction ratios of around 30 dB. © 2015 IEEE.


Zaki T.,University of Stuttgart | Zaki T.,Institute for Microelectronics Stuttgart | Rodel R.,Max Planck Institute for Solid State Research | Letzkus F.,Institute for Microelectronics Stuttgart | And 4 more authors.
IEEE Electron Device Letters | Year: 2013

This letter presents the first comprehensive experimental studies on the frequency response of staggered low-voltage organic thin-film transistors (OTFTs) using S-parameter measurements. The transistors utilize air-stable dinaphtho-thieno-thiophene as the organic semiconductor with various channel lengths and gate overlaps. A peak cutoff frequency of 3.7 MHz for a channel length of 0.6 μm, gate overlap of 5 μm, and a supply voltage of 3 V is achieved. In view of the low supply voltage and air-stability, this result marks a record achievement in OTFT technology. The channel length dependence of the cutoff frequency is described in a compact model and a close correspondence to the measured data of OTFTs with variable device dimensions is shown. Moreover, the cutoff frequencies at different gate biases are found to be proportional to the dc transconductance. © 1980-2012 IEEE.


Burghartz J.N.,Institute for Microelectronics Stuttgart | Angelopoulos E.,Institute for Microelectronics Stuttgart | Appel W.,Institute for Microelectronics Stuttgart | Endler S.,Institute for Microelectronics Stuttgart | And 6 more authors.
Chip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices | Year: 2013

Various aspects of ultra-thin chip technology for flexible electronics are presented and discussed, including ultra-thin-chip fabrication, mechanical and electrical characterization, as well as chip assembly and imbedding. A stress sensor based on a stack of two ultra-thin, flexible CMOS chips indicates the particular advantages of the Chipfilm™ process technology, which is subject of this paper, when compared to other kinds of thin-chip fabrication. © 2013 IEEE.


Zhang Y.,Institute for Microelectronics Stuttgart | Burghartz J.N.,Institute for Microelectronics Stuttgart
IEEE - 2011 Semiconductor Conference Dresden: Technology, Design, Packaging, Simulation and Test, SCD 2011 - International Conference, Workshop and Table-Top Exhibition | Year: 2011

A novel, high-voltage (HV) to low-voltage (LV) linear level-shifting cell using only one DMOS Transistor and two resistors is presented. Its infinite input resistance, wide receiving range and linear HV-to-LV level-shifting characteristics make it very suitable to build CMOS/DMOS mixed-voltage receiver circuits for industrial applications. Based on the new cell, a compact, wide receiving range, differential input HV-to-LV digital receiver and a circuit arrangement for HV-to-LV analog signal transmission with optimized output swing are designed. Functionalities of the designed receivers are verified by extensive simulations and experimental measurements. © 2011 IEEE.


Chun S.,Institute for Microelectronics Stuttgart | Schulze Spuntrup J.D.,Institute for Microelectronics Stuttgart | Burghartz J.N.,Institute for Microelectronics Stuttgart
2013 IEEE International Semiconductor Conference Dresden - Grenoble: Technology, Design, Packaging, Simulation and Test, ISCDG 2013 | Year: 2013

Electronic systems such as used in automotive or industrial applications require highly reliable micro-electronic systems, especially ASICs. This paper presents a novel aging sensor architecture which monitors the degradation of the digital and analog circuit in operation so as to achieve triggering of a failure warning a certain time distance ahead of the wearout region of an IC. The proposed programmable guardband interval in monitor provides various prediction levels of aging time step and also more resilient detection on temperature, supply voltage and process variations. Various simulation results are presented using a 0.15μm CMOS standard process and show that the new on-line failure prediction circuit is very useful for safety or mission critical applications. © 2013 IEEE.


Yordanov H.,Technical University of Sofia | Angelopoulos E.,Institute for Microelectronics Stuttgart
European Microwave Week 2013, EuMW 2013 - Conference Proceedings; EuMC 2013: 43rd European Microwave Conference | Year: 2013

On-chip integrated antennas show promising results for emergent applications like wireless chip-to-chip communications, wireless sensors, telemetry, etc. The radiation efficiency of such antennas is restrained by the high dielectric losses at microwave frequencies in the silicone substrate. Two ways to increase integrated antenna efficiency are to use either high-impedance or very thin silicon substrate. This paper presents the prototyping of antennas on ultra-thin substrate and compares the results with high-impedance based prototypes, presented in earlier publications. © 2013 European Microwave Association.

Loading Institute for Microelectronics Stuttgart collaborators
Loading Institute for Microelectronics Stuttgart collaborators