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South Bend, IN, United States

Kulick J.M.,Indiana Integrated Circuits, LLC | Bernstein G.H.,University of Notre Dame
Advancing Microelectronics

Indiana Integrated Circuits (IIC), LLC offers an alternative solution known as 'Quilt Packaging' (QP) specifically for RF/microwave systems composed of different materials. QP is a direct edge-interconnect technology that has experimentally demonstrated less than 0.1 dB of insertion loss across the entire bandwidth ranging from 50 MHz to more than 100 GHz without any resonances. It enables multiple die from different materials and processing technologies to be integrated into a monolithic-like system that performs essentially as if it has been created as a single chip. It also has a significant potential in MEMS integration, power management, and large-format imaging array applications, with significant cost and performance advantages. It has evolved from a basic research concept into an integration solution ready for wider-spread adoption. Source

Sparkman K.,Santa Barbara Infrared SBIR Inc. | Laveigne J.,Santa Barbara Infrared SBIR Inc. | McHugh S.,Santa Barbara Infrared SBIR Inc. | Kulick J.,Indiana Integrated Circuits, LLC | And 2 more authors.
Proceedings of SPIE - The International Society for Optical Engineering

Several new technologies have been developed over recent years that make a fundamental change in the scene projection for infrared hardware in the loop test. Namely many of the innovations are in Read In Integrated Circuit (RIIC) architecture, which can lead to an operational and cost effective solution for producing large emitter arrays based on the assembly of smaller sub-Arrays. Array sizes of 2048x2048 and larger are required to meet the high fidelity test needs of todaya's modern infrared sensors. The Test Resource Management Center (TRMC) Test and Evaluation/Science and Technology (T and E/S and T) Program through the U.S. Army Program Executive Office for Simulation, Training and Instrumentations (PEO STRI) has contracted with SBIR and its partners to investigate integrating new technologies in order to achieve array sizes much larger than are available today. SBIR and its partners have undertaken several proof-of-concept experiments that provide the groundwork for producing a tiled emitter array. Herein we will report on the results of these experiments, including the demonstration of edge connections formed between different ICs with a gap of less than 10μm. © 2014 SPIE. Source

Ahmed T.,University of Notre Dame | Butler T.,University of Notre Dame | Butler T.,Cork Institute of Technology | Khan A.A.,University of Notre Dame | And 4 more authors.
Proceedings of SPIE - The International Society for Optical Engineering

We present Finite-Difference Time-Domain (FDTD) simulations to explore feasibility of chip-to-chip waveguide coupling via Optical Quilt Packaging (OQP). OQP is a newly proposed scheme for wide-bandwidth, highly-efficient waveguide coupling and is suitable for direct optical interconnect between semiconductor optical sources, optical waveguides, and detectors via waveguides. This approach leverages advances in quilt packaging (QP), an electronic packaging technique wherein contacts formed along the vertical faces are joined to form electrically-conductive and mechanically-stable chip-to-chip contacts. In OQP, waveguides of separate substrates are aligned with sub-micron accuracy by protruding lithographically-defined copper nodules on the side of a chip. With OQP, high efficiency chip-to-chip optical coupling can be achieved by aligning waveguides of separate chips with sub-micron accuracy and reducing chip-to-chip distance. We used MEEP (MIT Electromagnetic Equation Propagation) to investigate the feasibility of OQP by calculating the optical coupling loss between butt coupled waveguides. Transmission between a typical QCL ridge waveguide and a single-mode Ge-on-Si waveguide was calculated to exceed 65% when an interchip gap of 0.5 μm and to be no worse than 20% for a gap of less than 4 μm. These results compare favorably to conventional off-chip coupling. To further increase the coupling efficiency and reduce sensitivity to alignment, we used a horn-shaped Ge-on-Si waveguide and found a 13% increase in coupling efficiency when the horn is 1.5 times wider than the wavelength and 2 times longer than the wavelength. Also when the horizontal misalignment increases, coupling loss of the horn-shaped waveguide increases at a slower rate than a ridge waveguide. © 2013 SPIE. Source

Indiana Integrated Circuits, LLC | Date: 2012-09-25

Amplifier for wireless communications; Antennas for wireless communications apparatus; Broadband wireless equipment, namely, telecommunications base station equipment for cellular and fixed networking and communications applications; Chip carriers, namely, semiconductor chip housings; Circuit testers; Computer chips; Computer hardware for wireless content delivery; Computer hardware, namely, wireless access point (WAP) devices; Computer hardware, namely, wireless network extenders; Computer hardware, namely, wireless network repeaters; Connectors for electronic circuits; Design libraries, namely, downloadable electronic data files for use in integrated circuit and semiconductor design; Devices for wireless radio transmission; Electric and electronic circuits; Electrical circuit boards; Electronic chips for the manufacturer of integrated circuits; Electronic circuits; Electronic integrated circuits; Integrated circuit handlers, namely, machines for testing integrated circuits; Integrated circuit module; Integrated circuit modules; Integrated circuits; Integrated circuits and integrated circuit cores for use in wireless communications and wireless communication equipment and apparati and digital signal processors (DSP); Large scale integrated circuits; Printed circuit boards; Printed circuit boards (PCBs); Probes for testing integrated circuits; Radar; Radar receivers with amplifiers; Satellite and microwave communications apparatus to transmit communications from a vehicle to another vehicle, or from a vehicle to a satellite; Semiconductor chips; Semiconductor devices; Semiconductor power elements; Semiconductors; Silicon chips; Supercomputers; Very large scale integration (VLSI) semiconductor integrated circuits; Wireless broadband radios.

Indiana Integrated Circuits, LLC | Date: 2014-03-14

Apparatuses and methods related to the field of microchip assembly and handling, in particular to devices and methods for assembling and handling microchips manufactured with solid edge-to-edge interconnects, such as Quilt Packaging interconnect technology. Specialized assembly tools are configured to pick up one or more microchips, place the microchips in a specified location aligned to a substrate, package, or another microchip, and facilitate electrical contact through one of a variety of approaches, including solder reflow. This specialized assembly tooling performs heating functions to reflow solder to establish electrical and mechanical interconnections between multiple microchips. Additionally, the interconnected microchips may be arranged in an arbitrarily large array.

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