Leuven, Belgium
Leuven, Belgium

Imec, formerly the Interuniversity Microelectronics Centre, is a micro- and nanoelectronics research center headquartered in Leuven, Belgium, with offices in Belgium, the Netherlands, Taiwan, USA, China, India and Japan. Its staff of about 2,000 people includes more than 600 industrial residents and guest researchers. Wikipedia.


Time filter

Source Type

The invention is related to an apparatus and method for delivering a gaseous precursor to a reaction chamber, wherein a mixture of a carrier gas and a precursor vapour is transported from a recipient where the precursor is vaporized, to the reaction chamber. A gas mixture transport line coupled to the recipient is maintained at the same temperature as the recipient and comprises a pressure control device configured to maintain the pressure upstream of the device at a pre-defined level, before releasing the mixture to an area at a lower pressure than the predefined level, whilst remaining at the abovenamed temperature. The controlled pressure drop leads to a reduction of the precursor vapours partial pressure in the mixture, allowing the supply to the reaction chamber to be delivered at a lower temperature without condensation of the precursor. A diluent gas flow may be added to the carrier/precursor mixture prior to the passage through the pressure control device, which allows an additional reduction of the partial pressure to be realized.


Patent
Imec and MegaChips Corporation | Date: 2017-05-03

The present invention relates to a device for calculating an indication of power of a received radio signal, said device comprising: a receiver (102) for receiving a plurality of logarithmic values representing a sequence of measurements of power of the received radio signal; circuitry (104) for determining a sum of the plurality of logarithmic values; wherein said circuitry (104) comprises: an adder (106) for pairwise summing of two logarithmic values, and a plurality of memory registers (108), which are arranged to store intermediate sums of logarithmic values, wherein the circuitry is arranged to control the adder (106) to sum the plurality of logarithmic values by a recursive procedure such that the first and the second logarithmic value in individual summations of the recursive procedure represent substantially same number of power measurements.


Patent
Imec and Catholic University of Leuven | Date: 2017-05-03

A method is provided for forming a porous, electrochemically active lithium manganese oxide layer on a substrate, the method comprising: depositing a porous manganese oxide layer on the substrate; providing a Li containing layer on the porous manganese oxide layer; and afterwards performing an annealing step at a temperature in the range between 200C and 400C, thereby inducing a solid-state reaction between the porous manganese oxide layer and the Li containing layer. The method may further comprise, before depositing the porous manganese oxide layer: depositing a seed layer on the substrate. A method of the present disclosure may be used for forming electrode layers of lithium-ion batteries.


A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.


Patent
Ghent University and Imec | Date: 2017-05-17

A photonic integrated circuit (10) comprises an input interface (12) adapted for receiving an optical input signal and splitting it into two distinct polarization modes and furthermore adapted for rotating the polarization of one of the modes for providing the splitted signals in a common polarization mode,. The PIC also comprises a combiner (16) adapted for combining the first mode signal and the second mode signal into a combined signal and a decohering means (15) adapted for transforming at least one of the first mode signal and the second mode signal such that the first mode signal and the second mode signal are received by the combiner in a mutually incoherent state. A processing component (17) for receiving and processing said combined signal is also comprised.


According to the method of the invention, a plurality of wafers, each comprising a plurality of integrated circuit dies, are bonded to form a stack of wafers. In this stack, the dies are bonded together by direct bonding techniques as known in the art. According to the invention, prior to each bonding step, singulation streets are produced along the circumference of two dies that are to bonded, to the extent that in the singulation streets, all materials of the dies are removed from the two surfaces that are to be bonded except the semiconductor substrate portion of the dies. This is preferably done by a litho and etch step, etching down through the materials until reaching the substrate portion. Singulation streets on directly bonded surfaces are mutually aligned in the bonding steps, and all singulation streets in the stack are equally aligned to each other. An additional singulation street, aligned with the earlier produced singulation streets, is produced on the top layer of the stack, after production of contact structures such as bumps or pillars. Separation of a stack of dies from the wafer stack is achieved by an etch step, removing the material of the substrates of the stack, in the area corresponding to the aligned singulation streets.


A method for fabricating a semiconductor structure, the method comprising providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.


According to the invention, a MIMCAP is integrated in a BEOL metallization stack built on a semiconductor substrate. The MIMCAP according to the invention comprises a first planar electrode provided with perforations, a MIM stack lining the inner surface of deep cavities produced in the perforations and reaching into the substrate, and a second electrode having a planar portion and metal extensions extending from the planar portion into the cavities. The first electrode and the planar portion of the second electrode are formed of or comprise planar metal areas of the respective metallization layers, obtainable by standard damascene processing. This allows to reduce series resistance. A low aspect ratio is obtainable given that only one electrode comprises a 3D-structure (the electrode having extensions extending into the cavities).


Patent
Imec | Date: 2017-05-31

A memory access unit acts as an intermediary between a microprocessor core and a physical memory. By interpreting an input memory address supplied by the microprocessor and formatting data being read from (or written to) the memory, the memory access unit facilitates compacted storage of data items in the memory, in a manner that is transparent to the microprocessor. Also provided is a system comprising the memory access unit, a memory and optionally a processor.


Patent
Samsung and Imec | Date: 2017-05-31

Provided are a Bragg grating and a spectroscopy device including the same. The Bragg grating is disposed at each of opposite ends of a resonator for reflecting light of a certain wavelength band and includes a core member extending from a waveguide of the resonator in a lengthwise direction of the waveguide; a plurality of first refractive members protruding from the core member and spaced apart from each other along the lengthwise direction; and a second refractive member filling spaces between the first refractive members and having a refractive index different from a refractive index of the first refractive members.

Loading IMEC collaborators
Loading IMEC collaborators