Frankfurt (Oder), Germany
Frankfurt (Oder), Germany

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Agency: European Commission | Branch: FP7 | Program: CP | Phase: ICT-SEC-2007.1.7 | Award Amount: 4.02M | Year: 2009

The goal of WSAN4CIP is to substantially advance the technology of Wireless Sensor and Actuator Networks (WSANs) beyond the current state of the art and to apply this technology to the Protection of Critical Infrastructures. In particular, the WSAN4CIP project will apply these advanced wireless and sensor network developments to the management of power generation and distribution infrastructure management systems, which is one of the most demanding applications for wireless infrastructure, to demonstrate the appropriateness and effectiveness of the WSAN4CIP project results. The project will contribute to making networked information and process control systems much more secure and resilient. The highly distributed nature of Wireless Sensor and Actuator Networks (WSANs) boosts their ability to survive malicious attacks as well as accidental and operational failures. It makes them dependable in critical situations, when information is needed to prevent further damage to Critical Infrastructures (CIs). As WSANs are inexpensive to deploy and self-organizing it is both practical and efficient to consider an emergency extension of the WSAN as a first reaction to CI problems. The WSAN4CIP project will show how exploiting these features make WSAN an ideal mechanism to improve situation awareness of managing tools for critical infrastructures. A main challenge of the WSAN4CIP project is that the current state-of-the-art technology for WSANs is not sufficiently dependable for CI use. The WSAN4CIP project will: - Design new sensor node protection mechanisms to improve their dependability - Develop innovative dependable networking approaches for WSANs - Create dependable services to run on top of WSANs that ensure a controlled degradation of information in case of failures rather than total management system failure. The project will also develop design methodologies, and define an open interface to ensure interoperability with existing CI management applications.

Wang P.,University of California at Los Angeles | Liang O.,University of California at Los Angeles | Zhang W.,University of California at Los Angeles | Schroeder T.,Ihp Microelectronics | Xie Y.-H.,University of California at Los Angeles
Advanced Materials | Year: 2013

A graphene-Au nano-pyramid hybrid system that enables label-free single molecule detection is demonstrated. The bio-compatible graphene-based SERS platform boosts a high density of hot spots with local SERS enhancement factor over 1010. We demonstrate that graphene can play a key role in quantitative study of SERS mechanisms, and can also serve as a promising building block in SERS active structures especially for biosensor applications. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ojefors E.,Sivers IMA AB | Heinemann B.,Ihp Microelectronics | Pfeiffer U.R.,University of Wuppertal
IEEE Transactions on Microwave Theory and Techniques | Year: 2012

Monolithically integrated 220- and 320-GHz receiver front-ends manufactured in an engineering version of an f T/f max=280/435-GHz SiGe technology are presented. Subharmonic mixing is provided by a Gilbert cell with stacked switching quads fed by quadrature 110/160-GHz local oscillator (LO) signals. The 220-GHz version of the front-end is equipped with an integrated LNA with a measured 15-dB gain and 28-GHz bandwidth. This front-end yields a conversion gain of 16 dB, an 18-dB single-sideband (SSB) noise figure (NF), and a 30-GHz bandwidth when pumped with a 0-dBm 110-GHz LO signal. The 320-GHz version of the front-end omits the low-noise amplifier and features an integrated × 9 LO multiplier chain to facilitate operation and characterization. A conversion gain of -14 dB and a 36-dB SSB NF is obtained over the 313-to-328-GHz frequency range. The presented circuits demonstrate that a fully integrated receiver front-end can be implemented up to submillimeter-wave frequencies in an SiGe HBT technology. © 2012 IEEE.

Zaumseil P.,Ihp Microelectronics
Journal of Applied Crystallography | Year: 2015

The occurrence of the basis-forbidden Si 200 and Si 222 reflections in specular X-ray diffraction ω-2Θ scans is investigated in detail as a function of the in-plane sample orientation Φ. This is done for two different diffractometer types with low and high angular divergence perpendicular to the diffraction plane. It is shown that the reflections appear for well defined conditions as a result of multiple diffraction, and not only do the obtained peaks vary in intensity but additional features like shoulders or even subpeaks may occur within a 2Θ range of about ±2.5°. This has important consequences for the detection and verification of layer peaks in the corresponding angular range. © 2015.

Osmany S.A.,Ihp Microelectronics | Herzel F.,Ihp Microelectronics | Scheytt J.C.,Ihp Microelectronics
IEEE Journal of Solid-State Circuits | Year: 2010

We present an integrated frequency synthesizer which is able to provide in-phase/quadrature phase signal over the frequency bands 0.6-4.6 GHz, 5-7 GHz, 10-14 GHz, and in-phase signal over 20-28 GHz for software-defined radio applications. An integrated voltage-controlled oscillator (VCO) with 34% tuning range and a set of high-speed dividers are used to accomplish all the frequencies. To achieve a wide tuning range while keeping a low gain and a low phase noise, the VCO employs digitally controlled sub-bands. The measured PLL phase noise is -108 dBc/Hz, -121 dBc/Hz, and -135 dBc/Hz at 1 MHz offset for 24 GHz, 4 GHz, and 700 MHz, respectively. Fabricated in a 0.25 μm SiGe BiCMOS process, the synthesizer occupies a chip area of 4.8 mm2. The synthesizer was optimized for reconfigurable base station applications, but can also be used for cognitive radio, radar systems, satellite communication, and high-speed digital clock generation. © 2010 IEEE.

Sun Y.,Ihp Microelectronics | Scheytt C.J.,Ihp Microelectronics
IEEE Microwave and Wireless Components Letters | Year: 2011

This letter presents a modified passive subharmonic mixer (SHM) topology based on an anti-parallel-diode-pair (APDP). It features a differential intermediate frequency output facilitating IC integration and improving common-mode noise rejection. An example 122 GHz SHM has been designed and tested in a 0.13 μm SiGe BiCMOS technology for a 122 GHz radar IC. SiGe HBT transistors have been diode-connected to form the APDP. The example SHM exhibits a conversion loss of 8 dB with a 5 dBm LO pumping power. The measured bandwidth extends from 117 to 124 GHz, adequately covering the 122-123 GHz ISM band, while the input 1 dB compression point and noise figure were measured to be -5 dBm and 8.5 dB respectively. Due to its superior 1/f noise performance and high linearity, the mixer is especially well suited to zero intermediate frequency radars. © 2006 IEEE.

Ihp Microelectronics | Date: 2012-12-20

A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.

Ihp Microelectronics | Date: 2011-03-22

A method for producing a MEMS component including the steps of simultaneously embedding structure elements during producing the multi-level conductive path layer stack which structure elements are to be subsequently exposed, subsequently producing a recess that extends from a substrate backside to the multi-level conductive path layer stack, exposing the micromechanical structure elements in the multi-level conductive path layer stack through the recess. In order to increase process precision a reference mask for defining a lateral position or a lateral extension of the micromechanical structure elements to be exposed is produced, wherein the reference mask is either arranged on the substrate front side between the substrate and the multi-level conductive path layer stack or in a layer of the multi-level conductive path layer stack which layer is more proximal to the substrate than the structure element to be exposed.

A light emitting semiconductor device according the invention includes an SOI substrate, a collector and an injector. The SOI substrate includes a carrier layer, a buried oxide layer on the carrier layer, and a doped silicon layer structure with a conductivity type. The doped silicon layer structure with the conductivity type includes at least two silicon- or silicon germanium layers arranged adjacent to one another, wherein a dislocation network is configured in their interface portions at which dislocation network a radiative charge carrier combination with a light energy is provided, which light energy is smaller than a band gap energy of the silicon- or silicon germanium layers. The collector is formed as a pn-junction in a portion between the dislocation network and a surface of the silicon layer structure that is oriented away from the carrier layer, and wherein the injector is configured as a metal insulator semiconductor diode.

Ojefors E.,University of Wuppertal | Heinemann B.,Ihp Microelectronics | Pfeiffer U.R.,University of Wuppertal
IEEE Transactions on Microwave Theory and Techniques | Year: 2011

A 325-GHz × 18 frequency multiplier chain implemented in a f T/f max=250 GHz/380 GHz evaluation SiGe heterojunction bipolar transistor technology is presented. The chain achieves a peak output power of -3 dBm and consists of a balanced doubler driven by two cascaded tripler stages. It operates from 317 to 328 GHz with a 0-dBm 18-GHz input signal and a 1.5-W power consumption. Additionally, 220- and 325-GHz doubler breakout circuits with integrated driver amplifiers are presented. The doublers reach an output power of -1 dBm at 220 GHz and -3 dBm at 325 GHz with a power dissipation of 630 and 420 mW, respectively. © 2011 IEEE.

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