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Leuven, Belgium

Gronicz J.,Aalto University | Gronicz J.,ICsense NV | Aaltonen L.,Aalto University | Chekurov N.,Aalto University | And 2 more authors.
Analog Integrated Circuits and Signal Processing | Year: 2016

This paper describes the design and measurement of a dual Phase-Locked Loop system that utilizes a MEMS VCO with a DC-controlled silicon resonator as the frequency-setting element. System-level considerations are given for the use of such structure in temperature compensation system for MEMS reference oscillators. Micromachining process and circuit design challenges of the particular implementation are also discussed. The PLL has been implemented using a 0.35 μm CMOS process and operates with a nominal supply of 3 V. The nominal supply voltage for the MEMS VCO is 24 V with 15 V bias applied to the silicon resonator. © 2016, Springer Science+Business Media New York.


Van Der Borght J.,Sofics BVBA | Van Wijmeersch S.,Sofics BVBA | Serneels B.,ICsense NV | Goodings C.,Aztec
Electrical Overstress/Electrostatic Discharge Symposium Proceedings | Year: 2011

Today's advanced technologies' overdrive transistors cannot always meet the signal speeds of existing standards. This paper describes the issues, solutions and results to build the necessary protection for HBM, MM, CDM and latch-up for a 3.3V domain and 1.8V/3.3V I/O, based only on 1.8V transistors, in a 40nm process. © 2011 ESD Association.

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