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Lauffer J.M.,i3 Electronics | Knadle K.,i3 Electronics
Proceedings - 2014 47th International Symposium on Microelectronics, IMAPS 2014 | Year: 2014

Common themes across all segments of electronic packaging today are density and performance. High density interconnect (HDI) technology is one of the most commonly utilized methods for electronic package density improvement, while many different areas have been investigated for performance improvement, from low loss dielectric and conductor materials, to via design and via stub reduction. Electrical performance and density requirements are sometimes complementary, but often times, conflicting with one another. This paper will describe the design, materials, fabrication, and reliability of a new Z-Interconnect technology that addresses both high density and high performance demands simultaneously. Z-Interconnect technology uses an electrically conductive adhesive to electrically interconnect several cores (Full Z) or sub-composites (Sub Z) in a single lamination process. Z-Interconnect technology will be compared and contrasted to other commonly used solutions to the performance and density challenges. HDI or sequential build-up technology is a pervasive solution to the density demands in semiconductor packaging and consumer electronics (e.g. Smart phones), but has not caught hold in HPC or A&D printed wiring board (PWB) applications. One solution for PWB electrical performance enhancement is plated through hole (PTH) stub reduction by "back drilling" the unwanted portion of the PTH. Pb-free reflow and Current Induced Thermal Cycling (CITC) test results of product coupons and specially designed test vehicles, having component pitches down to 0.4mm, will be presented. ZInterconnect test vehicles have survived 6X Pb-free (260C) reflow cycles, followed by greater than 3000 cycles of 23C-150C CITC cycles. Test vehicle and product coupons also easily survive 10 or more 23C- 260C CITC cycles. Copyright © 2014 IMAPS - International Microelectronics Assembly and Packaging Society All Rights Reserved.

Carver C.,i3 Electronics | Seastrand N.,i3 Electronics | Welte R.,i3 Electronics
Proceedings - 2014 47th International Symposium on Microelectronics, IMAPS 2014 | Year: 2014

Driven mainly by Moore's law, there is an ever accelerating drive for smaller, lighter, higher function, and lower power electronics. For PWBs this translates into higher wiring and component densities with ever increasing electrical performance requirements. As high speed serial data rates reach 30 Gbps and beyond, design considerations to promote signal integrity become ever more important. These tighter signal integrity constraints put increased emphasis on via stub effects, via to trace crosstalk in BGA escapes, and adequate ground stitch vias around layer transition vias. With the maturation of sintered paste VIAs in PWBs, VIA structures can be assembled to span only the layers to be connected. This paste technology allows vias to be specifically tailored to only connect the required layers. VIA stubs and their adverse SI effects for high speed signaling are completely eliminated. The elimination of via stubs also makes PWB fabrication easier by removing the need to backdrill or counterbore high speed signal vias. This increases yields and reduces costs associated with this complex and tight tolerance process. In addition to manufacturing advantages provided by Z technology, increased wireability is enabled by opening up area above and below the layers being connected, as well as the ability to use smaller diameter VIAs. These smaller vias also help to reduce crosstalk between high speed wiring channels. Z Interconnect technology also reduces BGA escape crosstalk by the ability to route in areas where via stubs have been removed, and also allows for the tailoring of ground stitch vias to only connect the ground planes associated with the specific stripline environments. However, Z VIAs usually require more pads within the padstack than conventional VIAs (cannot strip pads from non-connection layers) and the resistivity of the paste can be as much as 30 times greater than copper. This paper will quantify the high frequency signal characteristics associated with a PWB design using i3 Electronics sintered paste Z-VIAs. Results are presented based on modeling which is correlated with test vehicle measurements. Modeling also addresses manufacturing tolerances. Suggestions are made for optimizing passive channel structures to use this technology in support of high speed serial interconnects. Integration of i3's 2s1p Cores into new compact high speed stripline structures, which can be built without expensive subassemblies and sequential lamination processes, is also presented. These cores implement the positive aspects of Z Interconnect technology to eliminate via stubs and increase wireability in dense areas. Comparisons of Z Interconnect technology are also made to alternate methods of PWB construction to explain the risks and benefits of this technology. Copyright © 2014 IMAPS-International Microelectronics Assembly and Packaging Society.All Rights Reserved.

Fujimoto H.,Kyushu University | Fujimoto H.,i3 Electronics | Edura T.,Kyushu University | Miyayama T.,ULVAC PHI Inc. | And 3 more authors.
Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics | Year: 2014

The authors report the use of high-performance liquid chromatography (HPLC) and time-of-flight secondary ion mass spectrometry (TOF-SIMS) utilizing a gas cluster ion beam to accurately measure the dopant concentration and its depth profile in organic thin films used for organic light-emitting diodes. The total dopant concentrations estimated by HPLC for films of 4,4'-bis(carbazol-9-yl)biphenyl (CBP) doped with tris(2-phenylpyridinato)iridium(III) (Ir(ppy)3) are consistent with those measured by quartz crystal microbalances (QCMs) during the deposition. Concentrations measured for Ir(ppy)3:CBP films by HPLC and TOF-SIMS show a nearly linear relationship in the range of 1-8 wt. %. At concentrations higher than 8 wt. %, TOF-SIMS values significantly deviate because of the matrix effect. The depth profile of the dopant concentration measured by TOF-SIMS was in good agreement with that measured by QCMs during film deposition for concentrations below 8 wt. %. These methods are especially useful for comparing the dopant concentration of films deposited in different batches and equipment. © 2014 American Vacuum Society.

Fujimoto H.,Kyushu University | Fujimoto H.,i3 Electronics | Potscavage Jr. W.J.,Kyushu University | Edura T.,Kyushu University | And 2 more authors.
Organic Electronics: physics, materials, applications | Year: 2014

To understand why performance degradation is reduced for sputtered cathodes on organic devices when the electron transport layer (ETL) is doped with Li, we analyze electron-only devices using the thermally stimulated current (TSC) technique and modeling of temperature-dependent current-voltage characteristics with a trapped-charge-limited current (TCLC) model. The combined results suggest that the trap density measured by TSC might also include a portion of the density of the hopping sites in the lowest unoccupied molecular orbital levels, which contributes to charge transport. Compared to undoped devices, doped devices maintain a high density of hopping sites even when the Al is sputtered. We propose that the reduced effect of sputtering on electron injection and transport properties is because radical anions of Alq3 might still be formed by the strong reducer Li even if the organic material is partially damaged. An additional TSC peak and increased driving voltage for doped tris(8-hydroxyquinoline)aluminum (Alq3) as an ETL with a sputtered cathode suggests the formation of new traps possibly because of damage even though the transport is better compared to the undoped device. Such traps are not found in doped bathophenanthroline (Bphen) as an ETL, which shows no change in driving voltage.

Zhang Q.,Kyushu University | Tsang D.,i3 Electronics | Kuwabara H.,Kyushu University | Hatae Y.,Kyushu University | And 5 more authors.
Advanced Materials | Year: 2015

The design of efficient and concentration-insensitive metal-free thermally activateddelayed fluorescence (TADF) materials is reported. Blue and green organic light-emitting diodes (OLEDs) containing a hole-transport layer, an undoped TADF emissive layer, and an electron-transport layer achieve maximum external quantum efficiencies of 19%, which is comparable to the best doped OLEDs. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Blackwell K.,i3 Electronics | Alcoe D.,i3 Electronics | Egitto F.,i3 Electronics
International Conference and Exhibition on Device Packaging 2014 | Year: 2014

Advanced Electronics Packaging for A&D, industrial and medical applications is driving the need for novel substrate materials, ultra high density assemblies and unique form factors. Substrate materials and construction are key to overall package performance and reliability. By integrating the building blocks of SiP - advanced substrate technology, embedded passives and actives - coupled with concurrent engineering designfor- manufacture (DFM), advanced packaging solutions have been successfully implemented to reduce electronics volume and support the requirements for extremely miniaturized, atypical form factors. © 2014 IEEE.

Fujimoto H.,Kyushu University | Fujimoto H.,i3 Electronics | Miyayama T.,ULVAC PHI Inc. | Sanada N.,ULVAC PHI Inc. | And 2 more authors.
Organic Electronics: physics, materials, applications | Year: 2013

We fabricate aluminum cathodes that are almost free from plasma damage by DC magnetron sputtering for organic light-emitting diodes (OLEDs). While sputtering is widely known to have numerous advantages over conventional evaporation for mass production of devices, it can cause serious damage to organic layers. In this report, we fabricate devices that are free from plasma damage by introducing a 1%-Li-doped electron transport layer (ETL). The difference of external electroluminescence quantum efficiency between OLEDs with the structure ITO/α-NPD/ETL/Al (where ITO is indium tin oxide and α-NPD is N,N′-di(1-naphthyl)-N,N′-diphenylbenzidine) with Al cathodes deposited by conventional evaporation or sputtering is 0.1%, and their driving voltage is identical. We find that the Li-doped ETL should be thicker than 40 nm. Analysis of the depth profile of the ETL by time-of-flight secondary ion mass spectrometry indicates that considerable damage from sputtering extended to a depth of approximately 30 nm, suggesting that high-energy particles penetrated about 30 nm into the ETL. © 2013 Elsevier B.V.

Cain S.R.,Binghamton University State University of New York | Anderson A.,Custom Electronics Inc. | Tasillo E.,i3 Electronics | Infantolino W.,Binghamton University State University of New York | Wolfgramm P.,Binghamton Center for Emerging Technologies
Journal of Power Sources | Year: 2014

It has been demonstrated experimentally that a capacitor bank when connected in parallel with a battery increases the energy output by mitigating the effects of high current spikes in the load. High current draws are taken from the capacitor bank which can furnish a small amount of energy quickly. The battery which can furnish substantial energy over a period of time then recharges the capacitor bank during times of decreased load. With a current square wave (P-P of 1.5 to 2× the average), capacitors afforded an increase in the retrievable energy of approximately 8% for a lead acid battery, 40% for a rechargeable lithium ion battery, and 46% for a non-rechargeable lithium ion battery. © 2014 Elsevier B.V. All rights reserved.

PubMed | Sumika Chemical Analysis Service Ltd. and i3 Electronics
Type: | Journal: Scientific reports | Year: 2016

We evaluated the influence of impurities in the vacuum chamber used for the fabrication of organic light-emitting diodes on the lifetime of the fabricated devices and found a correlation between lifetime and the device fabrication time. The contact angle of the ITO substrates stored the chamber under vacuum were used to evaluate chamber cleanliness. Liquid chromatography-mass spectrometry was performed on Si wafers stored in the vacuum chamber before device fabrication to examine the impurities in the chamber. Surprisingly, despite the chamber and evaporation sources being at room temperature, a variety of materials were detected, including previously deposited materials and plasticizers from the vacuum chamber components. We show that the impurities, and not differences in water content, in the chamber were the source of lifetime variations even when the duration of exposure to impurities only varied before and after deposition of the emitter layer. These results suggest that the impurities floating in the vacuum chamber significantly impact lifetime values and reproducibility.

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