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Ich'on, South Korea

SK Hynix Inc. is a South Korean memory semiconductor supplier of dynamic random access memory chips and flash memory chips. Hynix is the world's second-largest memory chipmaker and the world's sixth-largest semiconductor company. Founded as Hyundai Electronic Industrial Co., Ltd. in 1983 and known as Hyundai Electronics, the company has manufacturing sites in Korea, the US, China and Taiwan. In 2012, when SK Telecom became its major shareholder, Hynix merged to SK Group, the third largest conglomerate in South Korea. The company's shares are traded on the Korea Stock Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange.Hynix memory is used by Apple Inc. in some of their MacBook and Macbook Pro computers, by Asus in their Google-branded Nexus 7 tablet, is an OEM provider for IBM System x servers, and is used in PC desktops as well as the ASUS Eee PC. Dell and Hewlett-Packard have also used Hynix memory as OEM equipment. Other products which uses Hynix memory include DVD players, cellular phones, set-top boxes, personal digital assistants, networking equipment, and hard disk drives. Wikipedia.


Patent
Hynix Semiconductor Inc | Date: 2013-05-02

A method for fabricating a semiconductor device includes forming a pad nitride layer that exposes an isolation region over a cell region of a semiconductor substrate; forming a trench in the isolation region of the semiconductor substrate; forming an isolation layer within the trench; etching an active region of the semiconductor substrate by a certain depth to form a recessed isolation region; etching the isolation layer by a certain depth to form a recessed isolation region; depositing a gate metal layer in the recessed active region and the recessed isolation region to form a gate of a cell transistor; forming an insulation layer over an upper portion of the gate; removing the pad nitride layer to expose a region of the semiconductor substrate to be formed with a contact plug; and depositing a conductive layer in the region of the semiconductor substrate to form a contact plug.


Patent
Hynix Semiconductor Inc | Date: 2013-02-15

In a method of fabricating a semiconductor device on a substrate having thereon a conductive layer, the conductive layer is patterned to form a plurality of opened regions. A gate insulation layer is formed on a side wall of each of the opened regions. A pillar pattern is formed in each opened region. On each pillar pattern, a gate electrode, which encloses the pillar pattern, is formed by removing the conductive layer between the pillar patterns.


An embodiment of an electronic device having a plurality of operative parameters is provided. The electronic device includes means for applying a plurality of trimming actions to each parameter for causing a corresponding correction of the parameter, for at least one reference parameter, means for measuring the reference parameter responsive to the application of at least part of the trimming actions, and means for forcing the application of the selected trimming action for the reference parameter. For each non-reference parameter different from the at least one reference parameter, the electronic device includes means for selecting one of the trimming actions for the non-reference parameter corresponding to the selected trimming action for the at least one reference parameter, and means for forcing the application of the selected trimming action for each non-reference parameter.


Patent
Hynix Semiconductor Inc | Date: 2012-11-12

An extreme ultraviolet (EUV) mask includes a quartz substrate including an absorption region and a reflection region, first and second multi-layered thin films formed on the quartz substrate, and a structure pattern disposed between the first and second multi-layered thin films.


Patent
Hynix Semiconductor Inc | Date: 2014-09-12

An internal voltage compensation circuit is provided which includes a power up signal generator configured to generate a power up signal, a select signal generator configured to compare a level of a first external voltage with a level of a second external voltage to generate first and second select signals, wherein the second select signal is generated in response to the power up signal, and a voltage compensation unit configured to electrically connect an internal voltage to the first external voltage or the second external voltage in response to the first and second select signals.

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