Hua Hong NEC Electronics Company

Shanghai, China

Hua Hong NEC Electronics Company

Shanghai, China
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Han B.,Fuyang Teachers College | Han B.,East China Normal University | Zhou T.,HuaHong NEC Electronics Company Ltd | Xu X.,HuaHong NEC Electronics Company Ltd | And 5 more authors.
International Journal of Electronics | Year: 2013

In this article, accurate de-embedding technique based on transmission line theory is presented and applied to on-wafer polysilicon resistors fabricated in 130-nm SiGe technologies. Compared with the conventional de-embedding methods, not only the top metal layer, but also the under-layer metal parasitics are removed from the on-wafer passives. A systematic method relying exclusively on embedded S-parameters is used for the direct extraction of device circuit elements. This extracted method is characterised by its simplicity and ease of implementation. The proposed de-embedding technique and extraction approach are validated by polysilicon resistors with occupying areas of 20 × 2 μm2. Good agreement between the measured and modelled data is obtained from 100 MHz up to 20.1 GHz. © 2013 Copyright Taylor and Francis Group, LLC.


Han B.,East China Normal University | Zhou T.,HuaHong NEC Electronics Company | Xu X.,HuaHong NEC Electronics Company | Li P.,HuaHong NEC Electronics Company | And 2 more authors.
International Journal of RF and Microwave Computer-Aided Engineering | Year: 2012

In this article, the influence of base resistance on extracting thermal resistance for SiGe heterojunction bipolar transistors is studied and an improved approach for determining the junction temperature and thermal resistance is presented. The proposed method for extracting thermal resistance is based on the temperature sensitivity of the base-emitter (B-E) voltage when the device is biased with a fixed emitter current density. This approach not only takes into account the self-heating during the different ambient temperature measurement but also revises the empirical equation of B-E voltage due to the influence of base resistance during the power dissipation increment measurement. Results are obtained for devices with different emitter lengths and fingers. Compared with the conventional method, the thermal resistance is about up to 15% improvement for the device with 0.3 × 1.9 μm 2 emitter area and 13.8% for the device with 0.3 × 13.9 μm 2 emitter area. The accurate thermal resistance implemented in HICUM model has resulted in better fit for transistor output characteristics. © 2012 Wiley Periodicals, Inc.


Han B.,East China Normal University | Zhou T.,HuaHong NEC Electronics Company | Xu X.,HuaHong NEC Electronics Company | Li P.,HuaHong NEC Electronics Company | And 2 more authors.
International Journal of RF and Microwave Computer-Aided Engineering | Year: 2012

In this article, a scalable large-signal model for SiGe heterojunction bipolar transistors (HBTs) is presented. Compared with SPICE Gummel-Poon model, the proposed model has taken into account the self-heating effects, which is important for large-signal operations. The model includes a new base-collector breakdown description, which has taken the current dependence into account. This model allows exact modeling of all transistor parameters from single emitter size cells to other size devices. The scaling rules are shown in detail. The model is verified by the SiGe HBTs with emitter area of 0.3 × 20.3, 0.3 × 13.9, 0.3 × 9.9, and 0.3 × 1.9 um 2. Excellent agreement has been achieved between modeled and measured data over a wide range of bias conditions and signal frequencies. The model has been implemented in Verilog-A using the ADS circuit simulator. © 2011 Wiley Periodicals, Inc.


Qian W.,Hua Hong NEC Electronics Company | Liu D.,Hua Hong NEC Electronics Company | Chen F.,Hua Hong NEC Electronics Company | Chen X.,Hua Hong NEC Electronics Company | And 4 more authors.
Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics | Year: 2012

The paper presents the device structure and fabrication process of 0.18 μm high speed SiGe HBT. The DC and RF characteristics of SiGe HBT are analyzed with typical F t=110 GHz, BV CEZ=1.8 V and β=270. The impact of different process conditions on SiGe HBT performance is investigated, including the doping of implanted collector, EPI SiGeC base and polysilicon emitter as well as the thickness of SiGeC base. The optimum process conditions are exhibited.


Qian W.,Hua Hong NEC Electronics Company | Liu D.,Hua Hong NEC Electronics Company | Hu J.,Hua Hong NEC Electronics Company | Duan W.,Hua Hong NEC Electronics Company | Shi J.,Hua Hong NEC Electronics Company
Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics | Year: 2012

This paper outlines newly designed ultra HV SiGe HBT with 0.18 μm logic process. This transistor has 2D "L shape" implanting doped collector including vertical collector and lateral collector under intrinsic base and field oxide, respectively, instead of conventional 1D vertical collector with epi silicon layer. The different breakdown voltages of SiGe HBT can be acquired with various lateral collector lengths in layout. As the result, SiGe HBT with ultra high BV CEZ and SiGe HBT array with different BV CEZ can be fabricated without process modification. The device fabrication process is exhibited, and the device DC and RF performances are summarized and analyzed systematically.

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