Hitachi Kokusai Electrical Inc.

Toyama-shi, Japan

Hitachi Kokusai Electrical Inc.

Toyama-shi, Japan

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In the present invention, the productivity of a processing apparatus including a plurality of process chambers is improved. There is provided a substrate processing apparatus including a plurality of process chambers, a process gas supply unit configured to supply a process gas into each of the plurality of process chambers, a purge gas supply unit configured to supply a purge gas into each of the plurality of process chambers, an exhaust unit configured to exhaust each of the plurality of process chambers and a control unit configured to control the process gas supply unit, the purge gas supply unit and the exhaust unit to supply the process gas into a first process chamber of the plurality of process chambers to which a substrate is transferred while supplying the purge gas into process chambers other than the first process chamber and exhausting the plurality of process chambers.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-01-30

A substrate processing apparatus includes a substrate retaining mechanism; a detecting unit detecting a placed state of the substrate retained by the substrate retaining mechanism; a first determination unit comparing detection data of the substrate obtained by the detecting unit with master data that is a reference to determine if the detection data is within a first allowed value; a confirmation unit confirming substrate type; a second determination unit comparing the detection data of the substrate with the master data to determine if the detection data is within a second allowed value; and a transfer control unit controlling the substrate retaining mechanism depending on a determination result of the second determination unit when substrate type is confirmed as a predetermined type by the confirmation unit when it is determined that the detection data is not within the first allowed value as determined by the first determination unit.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-03-08

A method of manufacturing a semiconductor device may include: performing a cycle a predetermined number of times to form an oxynitride film on a substrate, the cycle including: (a) supplying a source gas to the substrate via a first nozzle; and (b) supplying a nitriding gas and an oxidizing gas to the substrate via a second nozzle different from the first nozzle, wherein (a) and (b) are performed non-simultaneously, wherein (b) may include: (b-1) supplying only the oxidizing gas while suspending a supply of the nitriding gas; and (b-2) simultaneously supplying the nitriding gas and the oxidizing gas, wherein (b-1) and (b-2) are consecutively performed.


A method of manufacturing a semiconductor device includes: providing a substrate having an oxide film; performing, a predetermined number of times, a cycle of non-simultaneously performing supplying a precursor gas to the substrate, supplying a carbon-containing gas to the substrate, and supplying a nitrogen-containing gas to the substrate, or performing, a predetermined number of times, a cycle of non-simultaneously performing supplying a precursor gas to the substrate and supplying a gas containing carbon and nitrogen to the substrate, or performing, a predetermined number of times, a cycle of non-simultaneously performing supplying a precursor gas containing carbon to the substrate and supplying a nitrogen-containing gas to the substrate, the oxide film being used as an oxygen source to form a nitride layer containing oxygen and carbon as a seed layer; and forming a nitride film containing no oxygen and carbon as a first film on the seed layer.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-02-17

A method of manufacturing a semiconductor device includes: forming a base film containing a first element and carbon on a substrate by supplying a film forming gas to the substrate; and oxidizing the base film by supplying an oxidizing gas to the substrate to modify the base film into a C-free oxide film containing the first element.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-02-16

SISO decoding of a reception signal having a scrambled symbol arrangement is realized using a process having reduced complexity. Coordinates are generated for a reference point obtained by scrambling and mapping a symbol number not a symbol reference point position. This reference point simulates transmission-side scrambling and is generated for each symbol number by a first mapping unit. Because the binary expression of a corresponding original signal number is retained, a bit likelihood calculation unit can easily calculate a bit likelihood based on the distance between the reference point and a reception signal. The calculated bit likelihood is then deinterleaved and subjected to SISO error-correcting decoding. The thus obtained bit likelihood is then reinterleaved and used to calculate a symbol probability. Soft symbols are generated through the multiplication of all the calculated symbol probabilities by corresponding reference points output by a second mapping unit similar to the first mapping unit.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-02-28

There is disclosed an image processing method in which a video signal is inputted from an imaging optical system in which astigmatism remains, and is displayed on a two-dimensional display apparatus. Based on the circumferential direction modulation factor and radial direction modulation factor of a lens used in the imaging optical system, a signal including the amount of vertical or horizontal modulation factor correction proportional to an nth power (n is an integer greater than 1) of a distance from a center position of a screen of the two-dimensional display apparatus is outputted for at least one vertical or horizontal frequency of the two-dimensional display apparatus.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-07-19

The present invention carries out SISO decoding of a reception signal having a scrambled symbol arrangement using a process having reduced complexity. Coordinates are generated for a reference point obtained not through scrambling and mapping of a symbol reference point position but through scrambling and mapping of a symbol number. This reference point simulates transmission-side scrambling and is generated for each symbol number by a first mapping means. Because the binary expression of a corresponding original signal number is retained, a bit likelihood calculation means can easily calculate a bit likelihood based on the distance between the reference point and a reception signal. The calculated bit likelihood is thereafter deinterleaved and subjected to SISO error-correcting decoding. The thus obtained bit likelihood is then reinterleaved and used to calculate a symbol probability. Soft symbols are generated through the multiplication of all the calculated symbol probabilities by corresponding reference points output by a second mapping means similar to the first mapping means.


A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.


Patent
Hitachi Kokusai Electrical Inc. | Date: 2017-08-09

An IP communication system comprises: a switching hub having at least first to (n + 1)-th ports (where n is an integer equal to or greater than two); first to n-th IP devices connected to the respective ones of the first to n-th ports; and an IP address setting unit connected to the (n + 1)-th port. The IP address setting unit transmits, to the switching hub, a first port open instruction to open the first port and to close the second to n-th ports, and thereafter transmits, to the switching hub, a first IP address to be set to the first IP device. Upon reception of the first port open instruction from the IP address setting unit, the switching hub opens the first port and closes the second to n-th ports. Upon reception of the first IP address, the switching hub transmits the first IP address to the first IP device.

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