HiSilicon Technologies Co.

Beijing, China

HiSilicon Technologies Co.

Beijing, China
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He Z.,Zhejiang University | Yu L.,Zhejiang University | Zheng X.,Hisilicon Technologies Co. | Ma S.,Peking University
2014 IEEE International Conference on Multimedia and Expo Workshops, ICMEW 2014 | Year: 2014

After years of hard work, the first generation of Audio-video coding standard (AVS1) has become an international standard and been widely used in digital satellite HDTV broadcasting. However, the growing popularity of high resolution videos and the emergence of 3D, scalable, 10-bit and stationary scene videos raise a higher requirement for video coding standards. The second generation of Audio-video coding standard (AVS2) is an application-oriented video coding standard aiming at higher video coding efficiency. In AVS2, different profiles are set for different applications, such as main profile for general application, especially for high resolution videos, and scene profile for stationary scene videos. Coding tools are designed by jointly considering the coding complexity and performance gain. This paper will give an overview of AVS2. Results show that main profile has as high as 49.5% and 44.0% bit rate saving in non-low-delay and low-delay configurations compared to AVS1. And scene profile has as much as 52.7% and 28.5 % coding gain in non-low-delay and low-delay configuration compared to main profile. © 2014 IEEE.


Sun Y.,Hisilicon Technologies Co. | Zhan C.,Hisilicon Technologies Co. | Guo J.,Hisilicon Technologies Co. | Fu Y.,Hisilicon Technologies Co. | And 2 more authors.
IEEE International Reliability Physics Symposium Proceedings | Year: 2015

Localized Thermal Effect (LTE, i.e. self-heating) is one of the greatest reliability concerns of FinFET technologies. This paper introduced some new reliability design methodologies for aging and electromigration to address the LTE effects at circuit level. An industry level PLL circuit designed on a leading foundry's sub-16nm FinFET process was applied with the new methodologies to analyze the LTE impacts on the circuit reliability. The results not only showed very different behaviors and impacts of temperature accelerated degradations on circuit performance and functionality with and without comprehending LTE effects, but also demonstrated the effectiveness of the new LTE-aware design for reliability methodologies developed and deployed at Hisilicon. © 2015 IEEE.


Zhu C.,University of Electronic Science and Technology of China | Zhu C.,Center for Robotics | Li S.,University of Electronic Science and Technology of China | Li S.,Center for Robotics | And 3 more authors.
IEEE Transactions on Broadcasting | Year: 2016

3D video has raised great interest in the last decade and currently a new 3D video coding standard, known as 3D video coding extension of High Efficiency Video Coding (3D-HEVC), has been developed. The standard investigates the coding of multiview video plus depth, which consists of texture videos and depth videos of multiple views. Depth video, as a description of geometry information of a scene, is generally composed of large flat regions separated by sharp edges. The conventional video coding may fail to generate an accurate prediction for units with sharp edges due to its block-based prediction which cannot compensate (minor) boundary changes well. In order to attack the problem, a new texture-aware depth inter-prediction method is proposed, which incorporates pixel-oriented weighting in the bi-prediction process by exploiting motion and structure similarities between texture and depth videos. Furthermore, such pixel-oriented weighting scheme can be extended to the uni-prediction process by considering more prediction blocks with small motion vector displacements. Experimental results demonstrate that the adapted 3D-HEVC codec with the proposed method can achieve better rate-distortion performance compared to the original 3D-HEVC standard codec. © 1963-12012 IEEE.


Zhang Y.,University of Electronic Science and Technology of China | Zhu C.,University of Electronic Science and Technology of China | Lin Y.,HiSilicon Technologies Co. | Zheng J.,HiSilicon Technologies Co. | Wang Y.,University of Electronic Science and Technology of China
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | Year: 2015

In the development of a 3D video extension of High Efficiency Video Coding (HEVC) standard, namely 3D-HEVC, Depth-based Block Partitioning (DBBP) is employed to code texture videos in dependent views by utilizing coded depth information of an independent view. With the DBBP, a proper partition mode is determined with the coded depth information, which divides the current texture block into two regions and thereafter allows for fine-grained motion compensation of foreground and background separately. In the DBBP, the original partition method consists of two steps specifically, i.e. threshold calculation and matched filtering based on down-sampling, which is relatively high complex and redundant with a segment mask generation process. Accordingly, a simple yet more effective partition scheme for the DBBP coding is proposed in this paper, based on the available binary segment mask. While reducing computational complexity significantly, the proposed method also demonstrates bitrate saving for all the dependent texture views and synthesized views under common test conditions (CTC) configuration specified in the 3D-HEVC. © Springer International Publishing Switzerland 2015.


Wang X.,University of Electronic Science and Technology of China | Zhu C.,University of Electronic Science and Technology of China | Zheng J.,HiSilicon Technologies Co. | Lin Y.,HiSilicon Technologies Co. | Zhang Y.,University of Electronic Science and Technology of China
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | Year: 2014

In the depth-based 3D video system, filters used in texture and depth images denoising, such as bilateral filter and trilateral filter, are generally designed based on calculating the weighted average of reference pixels located around the pixel to be filtered. In this paper, we propose a 3D-spatial-texture bilateral filter by considering the relationship of two pixels in the 3D space, including geometric closeness in the 3D world coordinate, as well as their corresponding texture/color similarity. Accordingly, the weight is defined with two kernels describing two abovementioned factors respectively, namely, a spatial kernel and a range kernel. The experimental results show that better performance can be achieved by using the proposed filter for both texture and depth image denoising, compared with conventional bilateral filter and trilateral filter. © Springer International Publishing Switzerland 2014.


Zhang Y.,University of Electronic Science and Technology of China | Wang Y.,University of Electronic Science and Technology of China | Zhu C.,University of Electronic Science and Technology of China | Lin Y.,HiSilicon Technologies Co. | Zheng J.,HiSilicon Technologies Co.
Journal of Real-Time Image Processing | Year: 2016

In the development of 3D video extension of high efficiency video coding (HEVC) standard, known as 3D-HEVC, depth modeling modes (DMMs) are introduced in depth intra coding to represent object edges in depth maps. With the DMMs, a depth block is approximated by partitioning the block into two non-rectangular regions using Wedgelet or Contour partition, where each region is represented by a constant value referred to as a constant partition value (CPV). To predict the CPV more accurately and efficiently, we develop three approaches in this study. First, a better CPV predictor may be obtained by simply extending the actual depth map boundary, which can also simplify the CPV prediction by removing comparisons and average operations. Second, we propose to choose an optimal combination of delta CPVs in terms of view synthesis optimization at the encoder by checking more candidates. Finally, zero residual coding is suggested for DMMs coding units in the rate-distortion optimization loop. Experimental results demonstrate that about 0.2 and 0.1 % Bjøntegaard delta rate saving can be achieved on average for synthesized views with less complexity, under the all-intra and random access configurations, respectively. © 2016 Springer-Verlag Berlin Heidelberg


Zheng J.,HiSilicon Technologies Co. | Zhen X.,HiSilicon Technologies Co.
2012 IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 2012 | Year: 2012

Since different regions in picture have different sorts of texture, non-uniform quantization should be considered in macroblock level to meet the picture content. A parameterized frequency weighting and non-uniform macroblock level weighting scheme is proposed to improve the subjective quality of compressed video. This scheme is targeted to preserve texture details as well as region edge of video content in quantization process, which brings better subjective performance for the high definition video content coding © 2012 IEEE.


Ma S.,University of Electronic Science and Technology of China | Wang Y.,University of Electronic Science and Technology of China | Zhu C.,University of Electronic Science and Technology of China | Lin Y.,HiSilicon Technologies Co. | Zheng J.,HiSilicon Technologies Co.
2015 IEEE 17th International Workshop on Multimedia Signal Processing, MMSP 2015 | Year: 2015

In 3D-HEVC, a new coding standard of 3D video, Explicit Wedgelet mode within Depth Modelling Modes (DMM) partitions a depth block into two non-rectangular regions using a Wedgelet pattern selected from a Wedgelet lookup table. The Wedgelet lookup table is constructed during both encoder and decoder initialization for each block size ranging from 4×4 to 16×16, while the Wedgelet lookup table consists of a large number of Wedgelet bi-patterns, which involves relatively high computational complexity and may cause cache storing problem. In this paper, we propose a down-sampling method to reduce the number of Wedgelet patterns in the Wedgelet lookup table. The experimental results show our proposed down-sampling method can achieve storage size reduction by 27.8% with negligible 0.03% and 0.05% coding loss in both configurations of Common Test Conditions (CTC) and All Intra (AI), respectively. © 2015 IEEE.


Ma L.-H.,South China University of Technology | Li J.-H.,South China University of Technology | Tan X.-J.,HiSilicon Technologies Co.
Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science) | Year: 2013

A multi-direction latticed differential (DLD) operator combined with the "Winner Takes All (WTA)" competitive suppression strategy is proposed to remove the false corners along zigzag image edges and the repeatedly-detected corners in smooth regions, which improves the performance of the corner detector. In the investigation, first, a differential operator based on the Directionlet decomposition is proposed to eliminate the zigzag distortion. With the multi-direction latticed complex representation of the operator, image edges in arbitrary direction can be denoted without zigzag, and false corners with zigzag appearance can be effectively suppressed. Then, a competitive suppression algorithm, which defines a corner similarity with the constraint of neighborhood size according to the DLD response value, and merges similar corners with the WTA strategy, is put forward to remove slowly-varying corners. Experimental results show that the typical GLCP detector and the FAST detector combined with DLD are both obviously improved. For instance, the ACU value, which is a comprehensive evaluation index of the error detection rate and the missed detection rate, increases by 12.14% and 6.32%, respectively.


Patent
HiSilicon Technologies Co. | Date: 2012-10-04

Embodiments of the present invention provide a charging and power supplying circuit, method and application device, which relate to the field of smart charging, so as to improve efficiencies of battery charging and system power supplying. The charging and power supplying circuit includes a power supplying tributary and a charging tributary. An end of the power supplying tributary is connected to a power supply, and another end is connected to a system. An end of the charging tributary is connected to the power supply, and another end is connected to a battery. A first transistor, a second transistor, a third transistor, a first amplifier, a second amplifier, a third amplifier, a fourth amplifier, a first comparator, a second comparator, a charging controller, a logical switch, an adder and a first control module are connected to the power supplying tributary and the charging tributary.

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