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Wakayama-shi, Japan

Patent
Hanwa Electronic Ind. Co. | Date: 2012-07-06

An integral value measuring circuit includes an operational amplifier and a capacitor connected between input and output sides thereof, an electric potential of an output terminal where a predetermined resistance element connected to an output side of the operational amplifier is being zero, positive and negative DC voltage generating circuits which comprise positive and negative power sources, respectively, at the output side of the operational amplifier, the positive and negative DC voltage generating circuits and being connected to positive and negative power terminals, respectively, of the operational amplifier through switches, and a connection line between the negative power terminal and one switch and a connection line between the positive power terminal and another switch being connected to the positive and negative power terminals, respectively, of the operational amplifier through cross resistance elements having resistance values negligible compared to a leakage resistance value of the switches.


Itoh T.,Industrial Technology Center Of Okayama Prefecture | Kuriyama T.,Kinki University | Nakaie T.,Hanwa Electronic Ind. Co. | Matsui J.,Hanwa Electronic Ind. Co. | Miyamoto Y.,Hanwa Electronic Ind. Co.
IEEJ Transactions on Sensors and Micromachines | Year: 2015

We developed silicon micro-mirrors with two asymmetric axes for electrostatic field distribution measurements using a single external piezoelectric ceramic vibrating element. The 2D asymmetric silicon micro-mirrors were fabricated by using an SOI-MEMS process. The vibration transmissibility of the proposed mirror under a vacuum atmosphere was evaluated by dynamic analysis. We obtained the resonant frequency in the low-speed axis of 23.3 Hz and in the high-speed axis of 556.8 Hz respectively. To prevent a reduction in the amplitude width, we induced a 90° phase shift between the low- and high-speed axes at the resonance frequency. The ratio of the deformation between the low-speed axis of 30 Hz and the high-speed axis of 604 Hz was simulated to be 4.04. In measurement, the ratio of the deformation between the low-speed axis of 23.3 Hz and the high-speed axis of 556.8 Hz was 6.48. The difference between the calculated and experiment values were apparently due to the fabrication errors and frequency characteristics of piezoelectric ceramic vibrating element. A Lissajous pattern projected onto the screen. The scanning angle was a degree of 7.6 (total angle) in the low- and high-speed axis. We subsequently measured the electrostatic field distribution using the 2D asymmetric silicon micro-mirrors by means of the optical level method. © 2015 The Institute of Electrical Engineers of Japan.


Kuriyama T.,Kinki University | Takatsuji W.,Industrial Technology Center Of Okayama Prefecture | Itoh T.,Industrial Technology Center Of Okayama Prefecture | Maeda H.,Industrial Technology Center Of Okayama Prefecture | And 3 more authors.
IEEJ Transactions on Sensors and Micromachines | Year: 2014

Electrostatic field distribution measurement using a silicon micro-mirror array fabricated by Micro-Electro-Mechanical Systems (MEMS) process has been presented. The deflection angle of each micro-mirror, which is placed on a spherical surface and is deflected by electrostatic field, was measured optically using a two-dimensional optical scanner and a position sensitive detector (PSD). The obtained electrostatic data showed good agreement with Coulomb's law and the system was applied to measure the electrostatic field distribution of charged substance. © 2014 The Institute of Electrical Engineers of Japan.


Nakaie T.,Hanwa Electronic Ind. Co. | Matsui J.,Hanwa Electronic Ind. Co. | Miyamoto Y.,Hanwa Electronic Ind. Co. | Kuriyama T.,Kinki University | And 4 more authors.
Electrical Overstress/Electrostatic Discharge Symposium Proceedings | Year: 2013

We first performed real-time visualization measurement of electrostatic potential on the surface of a dielectric plate with a small charged metal plate. Time change of the electric potential differed with the resistance of dielectric plate. We confirmed that electrostatic charge had penetrated into a dielectric plate. © 2013 ESD Association.


Scholz M.,IMEC | Scholz M.,Vrije Universiteit Brussel | Chen S.-H.,IMEC | Vandersteen G.,Vrije Universiteit Brussel | And 5 more authors.
IEEE Transactions on Device and Materials Reliability | Year: 2013

Three system-level electrostatic discharge (ESD) design methodologies are compared using an RF buffer amplifier as case study. First, the system-level ESD protection is designed with datasheet information. The obtained overdesigned ESD protection is optimized with the System-Efficient ESD Design (SEED) methodology. The SEED-based protection design is further optimized using human metal model testing and transient simulations. The final ESD protection design requires five times less area on the application board, and the capacitive loading is six times lower than when designing with datasheet information. © 2001-2011 IEEE.

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