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Zhang H.B.,South China University of Technology | Zhang H.B.,University of Electronic Science and Technology of China | Cai M.,South China University of Technology | He X.,South China University of Technology | And 3 more authors.
Electronics Letters | Year: 2014

A broadband and high-K monolithic passive balun for silicon-based radio frequency integrated circuits (RFICs) are presented. It utilises the top level thick Cu metal and adopts a 16-side geometry. The proposed balun is designed and fabricated with a 0.13-μm CMOS mixedsignal 1P6M process. The measured results show that the amplitude imbalance is < 0.2 dB and the phase imbalance is within 4° from the frequency range of 0.1-7 GHz. Compared with the typical octagonal balun, the proposed design achieves the same coupling coefficients K and attains an enhancement in the transmission efficiency S 21 within the frequency range of 0.1-20 GHz, and the consumed chip area is reduced by 3%. © The Institution of Engineering and Technology 2014. Source


Zhang H.-B.,South China University of Technology | Zhang H.-B.,University of Electronic Science and Technology of China | Cai M.,South China University of Technology | Wu H.-J.,Guangzhou Runxin Information Technology Co. | Li Z.-P.,Guangzhou Runxin Information Technology Co.
Dianzi Keji Daxue Xuebao/Journal of the University of Electronic Science and Technology of China | Year: 2014

Transformer is a key device in radio frequency communication circuit, which can directly effect on the performance of the RF front-end circuit. However, there is not transformer in TSMC 0.13 m RF CMOS mixed-signal process library. In order to solve this problem, an octagonal transformer which is applied in LTE/WiMAX is designed and fabricated by the analysis of all kinds of on-chip transformer performance, and the frequency-independent lumped-element equivalent circuit model and the parameter-extracted expressions are given. The measurement results show that L and Q have excellent agreement with the measured data from the frequency range of 0.1 GHz to 10 GHz, and coupling coefficient K is perfect. The successful design of the transformer will contribute to the development and application of 4G communication chips. Source


Li W.,Guangzhou Runxin Information Technology Co. | Li W.,South China University of Technology | Chen H.,Guangzhou Runxin Information Technology Co. | Yao R.,South China University of Technology
2010 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2010 | Year: 2010

A 5.5-GHz pulse-swallow multi-modulus frequency divider for delta-sigma fractional-N frequency synthesizers is demonstrated in this paper. The frequency divider is composed of a synchronous current mode logic (CML) divide-by-4/5 prescaler, an asynchronous CML divide-by-4 divider and a digital programmable A-M counter. The proposed divider is optimized for high frequency and low power operation; the asynchronous divide-by-4 divider is triggered by the falling edge instead of the rising edge of the synchronous divide-by-4/5 prescaler to relax the timing requirement of the feedback modulus-select signal; the feedback modulus-select signal is provided by a NOR gate instead of AND gate, and the AM counter feedback is feed at the last NOR gate in the feedback chain to minimize its delay and increase the maximum operation frequency. A prototype has been implemented in 0.35μm SiGe BiCMOS technology, occupying 0.1mm 2 active silicon areas. The operating frequency is 5.5GHz; the divide ratio is 256∼511 with step of 1; and current consumption is 6.8mA in 3V power supply. © 2010 IEEE. Source


He S.,Guangzhou Runxin Information Technology Co. | Zhang C.,Guangzhou Runxin Information Technology Co. | Tao L.,Guangzhou Runxin Information Technology Co. | Zhang W.,Guangzhou Runxin Information Technology Co. | And 4 more authors.
Journal of Semiconductors | Year: 2013

A CMOS long-term evolution (LTE) direct convert receiver that eliminates the interstage SAW filter is presented. The receiver consists of a low noise variable gain transconductance amplifier (TCA), a quadrature passive current commutating mixer with a 25% duty-cycle LO, a trans-impedance amplifier (TIA), a 7th-order Chebyshev filter and programmable gain amplifiers (PGAs). A wide dynamic gain range is allocated in the RF and analog parts. A current commutating passive mixer with a 25% duty-cycle LO improves gain, noise, and linearity. An LPF based on a Tow-Thomas biquad suppresses out-of-band interference. Fabricated in a 0.13 μm CMOS process, the receiver chain achieves a 107 dB maximum voltage gain, 2.7 dB DSB NF (from PAD port), -11 dBm IIP3, and > +65 dBm IIP2 after calibration, 96 dB dynamic control range with 1 dB steps, less than 2% error vector magnitude (EVM) from 2.3 to 2.7 GHz. The total receiver (total I Q path) draws 89 mA from a 1.2-V LDO on chip supply. © 2013 Chinese Institute of Electronics. Source


Wu H.,Guangzhou Runxin Information Technology Co. | Li B.,South China University of Technology | Zhang H.,South China University of Technology | Li Z.,Guangzhou Runxin Information Technology Co. | Zeng L.,Guangzhou Runxin Information Technology Co.
Journal of Semiconductors | Year: 2014

A single die 1.2 V multi-stage noise shaping (Mash) 2-2 delta sigma analog to digital converter (ADC) for wide applications is implemented. The configurable Mash 2-2 modulator with a new decimation filter design is presented to achieve wide and high dynamic range (DR) for multiple practical applications. The novel modulator can be configured as a Mash 2-2 modulator for high precision or a 2-order modulator for low DR. The decimation filter is designed to select the OSR flexibly among cascaded integrator comb (CIC) filter and two half-band filters (HBF). The serial peripheral interface (SPI) can be used to adjust the sampling frequency and the oversampling ratio (OSR). The design was fabricated in a 0.13 μm CMOS process with an area of 0.91 mm 2 and a total power of 5.2 mW. The measurement results show that the dynamic range (DR) of the proposed ADC can change from 55 to 95 dB with the configurable OSR from 16 to 256. The spurious free dynamic range (SFDR) and signal-to-noise distortion ratio (SNDR) can get 99 dB and 86.5 dB, respectively. © 2014 Chinese Institute of Electronics. Source

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