Niigata-shi, Japan
Niigata-shi, Japan

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A method of forming a calibration curve is provided. The method includes ion-implanting different doses of an impurity, such as carbon, into a plurality of first samples and measuring an intensity of photoluminescence deriving from the impurity by photoluminescence spectroscopy for the first samples and a second sample made of the same semiconductor. Based on the amount of implanted impurity, the intensity of the photoluminescence, and the concentration of the impurity contained in the second sample measured by a method other than the photoluminescence spectroscopy, such as secondary ion mass spectroscopy, a calibration curve is formed.


Provided is a technique advantageous in forming a semiconductor device at a high yield from a silicon epitaxial wafer in which the carbon concentration of an epitaxial layer is 5 10^(14) atoms/cm^(3) or less. Carbon contained in an epitaxial layer of a silicon epitaxial wafer is rendered luminescence-active, the activated carbon is excited to cause the luminescence, and the intensity or intensity ratio of luminescence originating from carbon is obtained. The relationship between this intensity or intensity ratio and the collector-emitter saturation voltage is checked beforehand. A part or parts of wafers are extracted from a silicon epitaxial wafer manufacturing lot, and the luminescence intensity or intensity ratio of each extracted wafer is obtained. The quality of the manufacturing lot is determined by comparing this intensity or intensity ratio with the above-mentioned relationship.


Patent
Globalwafers Japan Co. | Date: 2014-07-10

A silicon single crystal manufacturing method includes: applying a transverse magnetic field to a melt of polysilicon with a carbon concentration of at most 1.010^(15 )atoms/cm^(3 )as a raw material; rotating the crucible at 5.0 rpm or less; allowing inert gas to flow at rate A (m/sec) of formula (1) at a position 20-50% of Y above the melt surface; controlling the rate A within the range of 0.2 to 5,000/d (m/sec) (d: crystal diameter (mm)); and reducing the total power of side and bottom heaters by 3 to 30% and the side heater power by 5 to 45% until the solidified fraction reaches 30%.


Patent
GlobalWafers Japan Co. | Date: 2016-03-09

During melting of a raw material before the start of pulling up of a silicon single crystal, the position of an upper end of a graphite crucible is controlled to be equal to or more than 5 mm but equal to or less than 95 mm above the upper end of a heater. Further, until the completion of pulling up of the silicon single crystal since when the raw material has been molten, the positon of the crucible is controlled, such that an exhaust cross-sectional area of a gap between a lower end of a radiant shield and a surface of a melt, in a first exhaust flow path, is smaller than an exhaust cross-sectional area of a third exhaust flow path formed by an inner tube and an outer tube.


According to an embodiment, a method of forming a calibration curve is provided. The method includes ion-implanting different doses of an impurity into a plurality of first samples, measuring an intensity of photoluminescence deriving from the impurity by a photoluminescence spectroscopy for the first samples and a second sample made of the same semiconductor. Based on the amount of implanted impurity, the intensity of the photoluminescence, and a concentration of the impurity contained in the second sample measured by a method other than the photoluminescence spectroscopy, a calibration curve is formed.


Patent
GlobalWafers Japan Co. | Date: 2016-03-28

Provided is a method for manufacturing a silicon wafer including a first step of heat-treating a raw silicon wafer sliced from a silicon single crystal ingot grown by the Czochralski method in an oxidizing gas atmosphere at a maximum target temperature of 1300 to 1380 C., a second step of removing an oxide film on a surface of the heated-treated silicon wafer obtained in the first step, and a third step of heat-treating the stripped silicon wafer obtained in the second step in a non-oxidizing gas atmosphere at a maximum target temperature of 1200 to 1380 C. and at a heating rate of 1 C./sec to 150 C./sec in order that the silicon wafer may have a maximum oxygen concentration of 1.310^(18 )atoms/cm^(3 )or below in a region from the surface up to 7 m in depth.


Patent
GlobalWafers Japan Co. | Date: 2015-01-14

A silicon single crystal manufacturing method includes:applying a transverse magnetic field to a melt of polysilicon with a carbon concentration of at most 1.0 10^(15) atoms/cm^(3) as a raw material; rotating the crucible at 5.0 rpm or less; allowing inert gas to flow at rate A (m/sec) of formula (1) at a position 20-50% of Y above the melt surface; controlling the rate A within the range of 0.2 to 5, 000/d (m/sec) (d: crystal diameter (mm));and reducing the total power of side and bottom heaters by 3 to 30% and the side heater power by 5 to 45% until the solidified fraction reaches 30%. Q: Inert gas volumetric flow rate (L/min)P: Pressure (Torr) in furnaceX: Radiation shield opening diameterY: Distance (mm) from raw material melt surface to radiation shield lower end : Correction coefficient


Patent
Globalwafers Japan Co. | Date: 2014-07-31

A silicon wafer is manufactured by subjecting a silicon wafer sliced from a silicon single-crystal ingot grown by the Czochralski process to a rapid thermal process in which the silicon wafer is heated to a maximum temperature within a range of 1300 to 1380 C., and kept at the maximum temperature for 5 to 60 seconds; and removing a surface layer of the wafer where a semiconductor device is to be manufactured by a thickness of not less X [m] which is calculated according to the below equations (1) to (3): X[m]=a[m]+b[m](1); a[m]=(0.0031(said maximum temperature)[ C.]3.1)6.4(cooling rate)^(0.4)[ C./second] . . . (2); and b[m]=a/(solid solubility limit of oxygen) [atoms/cm^(3)]/(oxygen concentration in substrate) [atoms/cm^(3)](3).


Patent
GlobalWafers Japan Co. | Date: 2013-03-15

A silicon wafer is provided in which a dislocation is less likely Lo be generated originating from an oxide precipitate in a semiconductor device forming process, and a gettering effect with respect to Cu is increased. A silicon wafer 1 is characterized in that a surface layer portion 1a from a surface to a depth of at least 5 m has an LSTD density of less than 1.0/cm^(2), and that in a bulk portion 1b except the surface layer portion 1a, planar oxide precipitates 2a and polyhedral oxide precipitates 2b having a scattered light intensity of 3000 to 5000 a.u., and a density of 1.010^(9 )to 6.010^(9 )(particles/cm^(3)) are each intermingled and grown, and a density ratio of the planar oxide precipitate to polyhedral oxide precipitate is represented by (planar oxide precipitate:polyhedral oxide precipitate=X: (100-X), where X is 10 to 40).


Patent
GlobalWafers Japan Co. | Date: 2016-03-02

To provide a silicon single crystal with a longer bulk lifetime and a lower carbon concentration which is fabricated by a Czochralski method and can be suitably applied to IGBT silicon substrates intended for higher withstand voltages. A silicon single crystal is obtained, wherein the crystal lifted up by a Czochralski method has a carbon concentration of 1. 0x10^(14) atoms/cm^(3) or less, and a bulk lifetime of 30 msecs or longer, in its crystal body portion having a solidification rate of up to at least 90%, wherein the bulk lifetime is determined by a photoconductivity decay method.

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