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Khurda, India

Moharana J.,GITA | Sengupta M.,BESU | Sengupta A.,BESU
International Journal of Power and Energy Conversion | Year: 2015

The static synchronous compensator (STATCOM) is becoming increasingly popular in power system applications. Through reactive power compensation, supply side power factor at point of common coupling (PCC) can be improved to almost unity. The highlight of the present work is the practical implementation of such a scheme on a 10 kVA STATCOM laboratory prototype fabricated for the purpose. The linear model of the STATCOM is discussed, in which the current and DC-link voltage controllers have been separately designed. The performance of all the designed controllers are first simulated and then experimentally validated as mentioned. Excellent agreement between the simulated and experimental results demonstrates the effectiveness of the proposed control strategy. Copyright © 2015 Inderscience Enterprises Ltd. Source


Nayak B.,Trdent Academy of Technology | Prasad S.,GITA
International Review on Computers and Software | Year: 2011

This paper deals with the overview of association rule mining algorithms in large databases used for especially business organizations where the amount of transactions and items plays a crucial role for effective decision making. Frequent item-set generation and the creation of strong association rules from the frequent item-set patterns are the two basic steps in association rule mining. It becomes very much tedious for mining the association rules as the data are growing instantaneously in every sphere of life. Therefore it becomes important to develop effective association rule mining techniques in such a way that interesting rules are mined effectively from large databases. In this paper we have analyzed different association rule mining techniques with its current directives for large databases. © 2011 Praise Worthy Prize S.r.l. - All rights reserved. Source


Nayak C.K.,GITA | Das S.,VSSUT | Behera H.S.,VSSUT
Smart Innovation, Systems and Technologies | Year: 2015

In communication medium a single fault will affect the complete system. So in the designing of Network-on-Chip (NoC) based systems the reliability is an important aspect. Also we have to concentrate on the performance improvement in the fault tolerant NoC architectures. In this paper, we are going to achieve high level performance by using hierarchical agents by proposing Fault-tolerant NoC architecture. The fault information will be collected and will be distributed after processing from these agents which are placed everywhere in the network. Along with that the permanent Faults information that occur in the interfaces of network, links and in different parts of the routers will be exploited from the enhanced fault tolerant and congestion aware routing method. © Springer India 2015. Source


Sahoo M.K.,GITA | Swain K.,GITA | Rath A.K.,VSSUT
Smart Innovation, Systems and Technologies | Year: 2015

In some secure communication system, to detect the frequently varied baseband signal, a digital down converter (DDC) with a variable digital filter is used. In this paper, a reconfiguration design process of DDC is discussed for a GSM application with the help of Xilinx system generator (XSG) on field programmable gate array (FPGA). The approach is based on hardware Co-simulation based on XSG platform which integrates itself with the Matlab based Simulink graphics environment and implemented on Virtex-II based xc2v200-4fg676 FPGA device. Optimal equiripple technique implements DDC which reduces the resource requirement. To solve the complexity, a novel type of polyphase decomposition structure is used. Keeping the view of the system performance, such as area and speed, this paper proposes a model which is implemented by using embedded multiplier, LUTs and BRAM of FPGA. It is seen that the proposed design consumes very less resources available on target devices. © Springer India 2015. Source


Panda R.N.,Nalanda Institute of Technology | Kumari Padhy S.,Siksha O' Anusandhan University | Panigrahi S.P.,GITA
Signal Processing | Year: 2013

This paper addresses the complexity problem associated with the QR decomposition algorithm, which is frequently used as a faster alternative to channel inversion in a MIMO scheme. Channel tracking can be employed with QR equalization in order to reduce the pilot overhead of a MIMO system in a non-stationary environment. QR decomposition is part of the QR equalization method and has to be performed in every instance that the channel estimate is obtained. The high rate of the QR decomposition, a computationally intensive technique, results in a high computational complexity per symbol. Some novel modifications are proposed to address this problem. Reducing the repetition rate of QR decompositions and tracking R (the upper triangular matrix) directly, while holding unitary matrix Q fixed, can significantly reduce complexity per symbol at the expense of some introduced error. © 2013 Elsevier B.V. All rights reserved. Source

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