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Tokyo, Japan

Fuji Electric Co., Ltd. , operating under the brand name FE, is a Japanese holding company that retains manufacturing companies of pressure transmitters, flowmeters, gas analyzers, controllers, inverters, pumps, generators, ICs, motors, and power equipment. Wikipedia.


Patent
Fuji Electric Co. | Date: 2016-01-08

A gate pad electrode and a source electrode are disposed, separately from one another, on the front surface of a super junction semiconductor substrate. A MOS gate structure formed of n source regions, p channel regions, p contact regions, a gate oxide film, and polysilicon gate electrodes is formed immediately below the source electrode. The p well regions are formed immediately below the gate pad electrode. The p channel regions are linked to the p well regions via extension portions. By making the width of the p well regions wider than the width of the p channel regions, it is possible to reduce a voltage drop caused by a reverse recovery current generated in a reverse recovery process of a body diode. Breakdown of a portion of a gate insulating film immediately below the center of the gate pad electrode and breakdown of the semiconductor device are thus prevented


Patent
Fuji Electric Co. | Date: 2015-01-07

Provided is an exhaust gas purifying apparatus capable of purifying exhaust gas by using water. The exhaust gas purifying apparatus includes an electrolyzed alkaline water generator which includes a cathode and an anode formed of Mg or an Mg alloy, and in which water is electrolyzed through application of voltage across the cathode and anode, to generate electrolyzed alkaline water. The purifying apparatus includes an exhaust gas absorption tower into which exhaust gas is introduced. Spray nozzles spray the electrolyzed alkaline water in the exhaust gas absorption tower.


Patent
Fuji Electric Co. | Date: 2015-01-07

A power converter includes a first arm configured by connecting a diode to a switching element, a second arm configured by connecting a diode to another switching element, a third arm formed of a first bidirectional switch configured by connecting switch elements, and a fourth arm formed of a second bidirectional switch configured by connecting other switch elements. An inverter circuit is configured by connecting the first and second arms in series between terminals of a direct current power source circuit, by connecting the third arm between a terminal of an alternating current power source and an output terminal, and by connecting the fourth arm between the output terminal and another output terminal. The control mode of the inverter circuit is switched between control modes at a timing at which at least one common arm continues a conductible condition.


Patent
Fuji Electric Co. | Date: 2015-10-27

A mounting jig for a semiconductor device includes an insulated circuit board positioning jig positioning an insulated circuit board by housing the insulated circuit board at a predetermined position, a tubular contact element positioning jig having a plurality of positioning holes at predetermined positions to insert a plurality of tubular contact elements respectively, and a tubular contact element press-down jig for pressing down the plurality of tubular contact elements inserted into the respective positioning holes in the tubular contact element positioning jig.


Patent
Fuji Electric Co. | Date: 2015-01-27

An apparatus such as a level shift circuit includes a first signal output device configured to output a first level shifting signal, a second signal output device configured to output a second level shifting signal, and first and second detector devices. The level shifting signals are to control an output switching element of a high potential side of an output device that includes a power source and a load. The first and second detector devices are respectively configured to compare the first and second level shifting signals to a reference signal and output respective first and second comparison result signals. The first and second comparison result signals are configured to at least partly control switching of the first and second level shifting signals based at least in part on the presence of a parasitic resistance.

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