Toulouse, France
Toulouse, France

Freescale Semiconductor, Inc. is an American multinational corporation headquartered in Austin, Texas with design, research and development, manufacturing and sales operations in more than 75 locations in 19 countries. The company employs 17,000 people worldwide.Freescale designs and produces embedded hardware and software for the automotive, networking, industrial and consumer markets with a current emphasis on technology enablement of the Internet of Things , Software-Defined Networking and Advanced Driver Assistance Systems .Freescale’s product portfolio includes microcontrollers , microprocessors , digital signal processors, digital signal controllers, sensors, RF power integrated circuits and power management ICs. The company also offers software development tools to support product design and development. Freescale’s current patent portfolio includes approximately 6,100 patent families.Freescale currently ranks 8th among semiconductor companies in the United States and is ranked 16th worldwide, as measured by total revenue. 17 billion Freescale semiconductor products are in use around the world today, enabling applications such as vehicle networking and information, vehicle radar and vision systems, networking security appliances, network routers and switches, hospital and in-home healthcare devices, smart energy, factory automation, eReaders and wearable devices. Wikipedia.


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Grant
Agency: GTR | Branch: EPSRC | Program: | Phase: Fellowship | Award Amount: 1.24M | Year: 2015

Future information and communication networks will certainly consist of both classical and quantum devices, some of which are expected to be dishonest, with various degrees of functionality, ranging from simple routers to servers executing quantum algorithms. The realisation of such a complex network of classical and quantum communication must rely on a solid theoretical foundation that, nevertheless, is able to foresee and handle the intricacies of real-life implementations. The study of security, efficiency and verification of quantum communication and computation is inherently related to the fundamental notions of quantum mechanics, including entanglement and non-locality, as well as to central notions in classical complexity theory and cryptography. The central Research objective of our proposal is an end to end investigation of the verification and validation of quantum technologies, from full scale quantum computers and simulators to communication networks with devices of varying size and complexity down to realistic ``quantum gadgets. This goal represents a key challenge in the transition from theory to practice for quantum computing technologies. We will work closely with experimentalists and engineers to ensure that theoretical progress takes Development considerations into account, and will design prototypes for proof-of-principle demonstrations of our methods. The experimental aspects of our proposal are supported by the PIs associate directorial position at the Oxford led hub, joint projects with the York led hub as well as other ongoing collaborations with experimental labs in France and Austria. Meanwhile the required expertise in engineering design would be supported through a new collaboration of the PI as part of the Edinburgh Li-Fi research and development centre. The Deployment axis, complementing our core activity in research-development, will be built upon the unique Edinburgh entrepreneurial culture supported by Informatics Ventures as well as a dedicated senior business advisory board (which sponsored the PIs recent patent on quantum cloud). Advances to the problem of secure delegated computation would have an immediate significant consequence on how computational problems are solved in the real world. One can envision virtually unlimited computational power to end users on the go, using just a simple terminal to access the computing cloud which would turn any smartphone into a quantum-enhanced phone. This will generate new streams of growth for the UK cyber security sector as well as complementary business developments for the National quantum technology investment.


Patent
Freescale Semiconductor | Date: 2016-10-19

The present application relates to a display controller and display system and a method of operating thereof. At a filtering stage display image data are generated on the basis of received pixel-mapped image data. The filtering operation accepts a plurality of pixels out of the received image data as input values to generate a pixel of the display image data as output value. It is further determined whether the plurality of pixels being the input values to the filtering operation are marked. If all pixels thereof are marked, the output pixel being the output value is marked. The marked pixels in the display image data are validated on the basis reference data.


A method for performing scan testing using a scan chain having a plurality of storage elements is described. During a capture phase, each storage element of the scan chain stores data from a first data input of the storage element synchronously to a clock signal. And during a shift phase, a scan pattern is shifted into the scan chain in which each storage element stores data from a second data input of the storage element asynchronously with the clock signal.


Patent
Freescale Semiconductor | Date: 2016-01-06

A woven signal-routing substrate for a wearable electronic devoce has conductive warps and wefts that are woven with each other and with insulative warps and wefts. Woven electrical cross-connections are formed at some of the intersections of the conductive warps and wefts, while no electrical cross-connections are formed at other intersections, to provide a signal-routing architecture for the substrate that can be used to route signals between electronic components of the wearable device. Non-connecting intersections are formed using insulative warps that are sufficiently thicker than the relatively thin conductive warps to enable a conductive weft to cross a conductive warp without making physical contact at intersection locations where an electrical cross-connection is not desired. The woven electrical cross-connections may be formed at other intersection locations using weaving topologies that ensure that the corresponding mutually orthogonal warps and wefts do contact one another.


Patent
Freescale Semiconductor | Date: 2016-03-15

A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.


Patent
Freescale Semiconductor | Date: 2016-06-14

A wafer level packaging method entails providing electronic devices and providing a platform structure having cavities extending through the platform structure. The platform structure is mounted to a temporary support. One or more electronic devices are placed in the cavities with an active side of each electronic device facing the temporary support. The platform structure and the electronic devices are encapsulated in an encapsulation material to produce a panel assembly. Redistribution layers may be formed over the panel assembly, after which the panel assembly may be separated into a plurality of integrated electronic packages. The platform structure may be formed from a semiconductor material, and platform segments within each package provide a fan-out region for conductive interconnects, as well as provide a platform for a metallization layer and/or for forming through silicon vias.


Patent
Freescale Semiconductor | Date: 2016-09-21

The embodiments described herein provide a radar device and method that can provide improved sensitivity. In general, the embodiments described herein provide a saturation detector and reset mechanism coupled to a radar receiver. The saturation detector is configured to detect saturation events in the radar receiver, and the reset mechanism is configured to reset at least one filter unit in the radar receiver in response to detected saturation events. As such, the embodiments can facilitate improved radar sensitivity by reducing the effects of saturation events in the radar receiver.


A device includes multiple ceramic capacitors and a current path structure. A first ceramic capacitor includes a first ceramic material between first and second electrodes. A second ceramic capacitor includes a second ceramic material between third and fourth electrodes. The second ceramic material has a higher Q than the first ceramic material. The current path structure includes a lateral conductor located between the first and second ceramic materials, and first and second vertical conductors that extend from first and second ends of the lateral conductor to a device surface. The device may be coupled to a substrate of a packaged RF amplifier device, which also includes a transistor. For example, the device may form a portion of an output impedance matching circuit coupled between a current carrying terminal of the transistor and an output lead of the RF amplifier device.


An embodiment of a device includes a terminal, an active transistor die electrically coupled to the terminal, a detector configured to sense a signal characteristic on the terminal, and control circuitry electrically coupled to the active transistor die and to the detector, wherein the active transistor die, detector, and control circuitry are coupled to a package. The control circuitry may include a control element and a control device. Based on the signal characteristic, the control circuitry controls which of multiple operating states the device operates. A method for controlling the operating state of the device includes sensing, using the detector, a signal characteristic at the terminal, and determining, using the control device, whether the signal characteristic conforms to a pre-set criteria, and when the signal characteristic does not conform to the pre-set criteria, modifying the state of the control element to alter the operating state of the device.


Patent
Freescale Semiconductor | Date: 2016-11-02

A driver circuit (200) includes first (215) and second (225) pluralities of series-connected inverters for pre-driving an input signal (IN) to first and second drive transistors (224, 234) , and a plurality of capacitors (250-258). The first and second drive transistors (224, 234) coupled to the last inverter of the first (22) and second (232) pluralities of series-connected inverters. Each capacitor of the plurality of capacitors coupled between the output terminals of corresponding inverters of the first and second pluralities of series-connected inverters. In another embodiment (fig. 3), a plurality of discharge circuits (328-334) is coupled to the first plurality of series-connected inverters (311). Another embodiment (fig. 4) includes a combination of capacitors 468-480 and discharge circuits (470-474, 4802-486) coupled to the first plurality of series-connected inverters (411). The embodiments (fig. 2, 3, 4) provide a driver circuit (224, 234 or 354, 364 or 454, 464) with high frequency voltage regulation (at regulated volatge Vddo, Vssr).

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