Fraunhofer Center for Nanoelectronic Technologies

Dresden, Germany

Fraunhofer Center for Nanoelectronic Technologies

Dresden, Germany
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Heintze C.,Helmholtz Center Dresden | Hernandez-Mayoral M.,CIEMAT | Ulbricht A.,Helmholtz Center Dresden | Bergner F.,Helmholtz Center Dresden | And 3 more authors.
Journal of Nuclear Materials | Year: 2012

Ferritic/martensitic high-chromium steels are leading candidates for fission and fusion reactor components. Oxide dispersion strengthening is an effective way to improve properties related to thermal and irradiation-induced creep and to extend their elevated temperature applications. An extensive experimental study focusing on the microstructural characterization of oxide-dispersion strengthened Fe-9wt%Cr model alloys is reported. Several material variants were produced by means of high-energy milling of elemental powders of Fe, Cr and commercial yttria powders. Consolidation was based on spark plasma sintering. Special emphasis is placed on the characterization of the nano-particles using transmission electron microscopy, small-angle neutron scattering and atom probe tomography. The microstructure of the investigated alloys and the role of the process parameters are discussed. Implications for the reliability of the applied characterization techniques are also highlighted. © 2011 Elsevier B.V. All rights reserved.

Galler R.,EQUIcon Software GmbH | Choi K.-H.,Fraunhofer Center for Nanoelectronic Technologies | Gutsch M.,Fraunhofer Center for Nanoelectronic Technologies | Hohle C.,Fraunhofer Center for Nanoelectronic Technologies | And 4 more authors.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2010

The e-beam lithography is faced with increasing challenges to achieve a satisfying patterning of structures with critical dimensions of about 32 nm or below. The reason for this issue is the unavoidable blurring of the deposited e-beam energy due to beam blur, electron scattering (forward and backward), and resist effects. The distribution of the finally deposited dose differs from the dose weighted geometry of the printed layout. In general, the finally deposited dose is described as convolution of the layout with a process specific proximity function being a model for the unavoidable blurring. This process proximity function (PPF) is often approximated by a superposition of two or more Gaussian functions. Thus, the electron forward scattering and resist effects, being most critical to the pattern fidelity, are often described altogether by the so called alpha-parameter of the PPF. Due to these physical reasons, when the desired critical dimension of a structure is near or below the alpha-parameter of the PPF, it may be just impossible to print the structure because of the vanishing image contrast due to the blurring. It was shown by means of the simulation feature of the ePLACE data prep package that in this situation a modification of both the geometry and the dose assignment of the shapes will significantly increase the contrast of the deposited energy and thus, even preserve the printability of critical structures. This geometrically induced dose correction (GIDC) method is implemented in the ePLACE package. The simulation results for test structures are now validated by exposures of test patterns and its results clearly establish the practical advantage of the new method. In this paper we will publish the results of the related exposures - done on Vistec SB3050 series shaped e-beam writers - demonstrating the practical importance of the GIDC method for layouts with critical dimensions of 32 nm and below. © 2010 SPIE.

Naumann A.,Fraunhofer Center for Nanoelectronic Technologies | Naumann A.,Global Foundries Dresden Module One LLC and Co. KG | Kelwing T.,Fraunhofer Center for Nanoelectronic Technologies | Kelwing T.,Global Foundries Dresden Module One LLC and Co. KG | And 8 more authors.
Materials Research Society Symposium Proceedings | Year: 2010

Silicon germanium (SiGe) is considered to substitute silicon (Si) as channel material of p-type MOSFET in future CMOS generations due to its higher hole mobility. In this work we investigate SiGe channels with a germanium concentration of 23 at% and 30 at%, even though the mobility is expected to be higher with even more germanium in the alloy. Low pressure chemical vapor deposition was used for SiGe deposition. A state of the art CMOS process including high-k dielectric and metal gate electrode was applied for fabrication of sub 50 nm gate length devices. As expected from the SiGe channel conduction and valence band offset the threshold voltage of the devices is influenced. The gate stack was directly deposited onto the SiGe layer consisting of a chemically grown base oxide, hafnium-based dielectric and titanium nitride gate electrode. C-V and I-V measurements show comparable CET and leakage values for the high-k metal gate stack on Si and SiGe channels. The trap density at the channel dielectric interface was determined using the charge pumping technique. The device characteristics of n-and p-MOSFETs with SiGe channels are compared to conventional Si channel devices. Short channel mobility was extracted with the gM,LIN-Method. © 2010 Materials Research Society.

Schroeder U.,NaMLab gGmbH | Martin D.,NaMLab gGmbH | Mueller J.,Fraunhofer Center for Nanoelectronic Technologies | Yurchuk E.,NaMLab gGmbH | And 6 more authors.
ECS Transactions | Year: 2012

The ferroelectric behavior of capacitors based on hafnium oxide dielectrics will be reported. Thin films of 6-30 nm thickness were found to exhibit ferroelectric polarization-voltage hysteresis loops when integrated into TiN-based metal-insulatormetal capacitors. A remanent polarization up to 25 μC/cm2 and a high coercive field of about 1 MV/cm was observed. Doping of HfO2 by different dopants with an atomic radius ranging from 110 nm (Si) to 188 nm (Gd) was evaluated and in all cases ferroelectric behavior was verified by P-V hysteresis, small signal capacitance-voltage, and for Si by piezoelectric measurements. Polarization retention showed no significant decay within a measurement range of up to two days. © The Electrochemical Society.

Beug M.F.,Physikalisch - Technische Bundesanstalt | Melde T.,Nanoelectronic Material Laboratory GmbH | Paul J.,Fraunhofer Center for Nanoelectronic Technologies | Knoefler R.,Infineon Technologies
IEEE Transactions on Electron Devices | Year: 2011

The sidewall gate-etch damage influence on the electrical behavior of 48-nm TaN/Al 2O 3/SiN/SiO 2/Si (TANOS) nand charge-trapping memory cells is investigated in detail. This etch damage occurs at the sidewall of the high work-function TaN metal gate and high-k Al 2O 3 blocking-oxide layers and adversely affects the electrical performance and the mechanical stability of small-ground-rule TANOS cells. Both issues could be solved for 48-nm TANOS cells by the introduction of a new integration scheme, which includes a removable encapsulation liner. This SiN liner protects the TaN sidewall from the etch damage during the aggressive Al 2O 3 high-k etch process. The optimum of the 48-nm electrical cell performance was found for a 4-nm encapsulation liner thickness. In contrast to 48-nm TANOS cells, the encapsulation liner thickness does not affect the electrical performance of large 5-μ m-long-and-wide memory cells. The memory cell performance dependence on the TANOS liner thickness and memory cell size is explained by a damaged Al 2O 3 region approximately 34 nm thick at the block oxide side wall. As a result, the reported etch damage exhibits a new scaling issue for TANOS memory cells around the 20-nm technology node when the total encapsulation liner thickness approaches half of the memory cell length. © 2011 IEEE.

Gerlich L.,Fraunhofer Center for Nanoelectronic Technologies | Ohsiek S.,Globalfoundries | Klein C.,Globalfoundries | Geiss M.,Globalfoundries | And 3 more authors.
Microelectronic Engineering | Year: 2013

As a consequence of device shrinking the resistivity of the widely used TaN/Ta double barrier layer becomes an increasingly important parameter for device speed beyond the 32 nm technology node. In this study we describe the optimization of the deposition of TaN/Ta stacks in such a way that tantalum nitride layer thickness is minimized and tantalum grows in the favorable conducting α-phase. In the first part of the study we used in situ ARXPS to investigate the growth of different tantalum nitride layers on SiO2 and SiOCH as a function of deposition time, nitrogen flow and deposition power. In the second part we analyzed the crystalline phase of a 20 nm thick tantalum layer deposited on top of the same series of tantalum nitride layers characterized in the growth study. The main findings are the appearance of tantalum carbide and tantalum silicide as interface species for the deposition on SiOCH and only tantalum silicide for the deposition on SiO2. We found that α-tantalum grows preferably on tantalum carbide and nitrogen rich intermediate layers whereas silicide at the interface promotes the growth of β-tantalum. To verify these findings we studied two additional modifications of the interface. A lower bias power for a deposition of tantalum nitride on SiO2 was used to confirm the role of tantalum silicide and a thermal treatment of a thin tantalum layer on SiOCH was applied to confirm the role of tantalum carbide. Finally, the contact resistance in via chains on patterned wafers for four selected processes showed the same trends as the sheet resistance of the corresponding barrier films on blanket wafer experiments. © 2013 Elsevier B.V. All rights reserved.

Gerlich L.,Fraunhofer Center for Nanoelectronic Technologies | Ohsiek S.,Globalfoundries | Klein C.,Globalfoundries | Geiss M.,Globalfoundries | And 3 more authors.
2011 IEEE International Interconnect Technology Conference and 2011 Materials for Advanced Metallization, IITC/MAM 2011 | Year: 2011

A physical vapor deposition tool for 300 mm wafers was coupled with an angle resolved photoelectron spectroscopy tool (ARXPS) and used to study the growth of TaN single layer and TaN/Ta double layer diffusion barriers. The nitrogen content of TaN was adjusted by controlling the nitrogen flow and by varying the deposition power. We describe a process recipe that allows us to decrease the TaN thickness while still maintaining the Ta layer in the low resistivity -phase. The process recipe was developed on blanket wafers and evaluated in a test structure for high performance CMOS products. © 2011 IEEE.

Yurchuk E.,NaMLab gGmbH | Muller J.,Fraunhofer Center for Nanoelectronic Technologies | Knebel S.,NaMLab gGmbH | Sundqvist J.,Fraunhofer Center for Nanoelectronic Technologies | And 5 more authors.
Thin Solid Films | Year: 2013

The ferroelectric behaviour of silicon doped hafnium oxide has been investigated using metal-insulator-metal capacitor structures for film thicknesses of 9 and 27 nm, annealing temperatures between 450 and 1000°C and silicon contents from 0 to 8.5 cat%. For the 9 nm thick films, an improvement of the ferroelectric remanent polarization was revealed for decreasing silicon content and increasing annealing temperature, which corresponds well with the HfO2 structural phases observed by x-ray diffraction. An increase of the film thickness up to 27 nm induced an apparent decrease of the remanent polarization and modified the temperature dependence. This change in the ferroelectric properties was shown to be determined by the different crystallization behaviour of the thick films with respect to the thin films. © 2012 Elsevier B.V. All rights reserved.

Michalowski P.P.,Fraunhofer Center for Nanoelectronic Technologies | Beyer V.,Fraunhofer Center for Nanoelectronic Technologies | Czernohorsky M.,Fraunhofer Center for Nanoelectronic Technologies | Kucher P.,Fraunhofer Center for Nanoelectronic Technologies | And 3 more authors.
Physica Status Solidi (C) Current Topics in Solid State Physics | Year: 2010

Silicon diffusion from the substrate through Al1-xSi xOy thin films was investigated by ToF-SIMS depth profiling. Two types of substrate stacks were analyzed: Si wafer with either native oxide or with additional silicon nitride layer. The amount of diffused silicon depends strongly on the type of the substrate. The activation energy for pure alumina was found to be 2.27 ± 0.02 eV and 3.73 ± 0.02 eV for SiO2/Si and Si3N4/SiO2/Si samples, respectively. Furthermore it was proved that the activation energy increases with higher concentration of Si for SiO2/Si samples whereas it decreases for Si3N4/SiO2/Si. Detailed analysis of SIMS depth profiles provide satisfactory explanation of this phenomenon: SiO2 has much stronger tendency to react with Al 1-xSixOy material forming an interface layer that restrain further diffusion of Si from the substrate. © 2010 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Gault B.,University of Oxford | Muller M.,University of Oxford | La Fontaine A.,University of Sydney | Moody M.P.,University of Sydney | And 4 more authors.
Journal of Applied Physics | Year: 2010

The impact of laser pulsing on the field evaporation process is investigated for Al and W by pulsed laser atom probe tomography. Quantitative analysis reveals the influence on the spatial resolution of the peak temperature reached by the specimen following light absorption from the laser pulse. It is concluded that surface migration processes induce significant degradation of the lateral resolution, changing by 100% and 20%, respectively, for Al and W when the specimen temperature is increased from 4% to 7% of the material's melting point, while the in-depth resolution is shown to remain nearly constant for both materials. © 2010 American Institute of Physics.

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