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News Article | February 15, 2017
Site: www.nature.com

The sensing of infrared radiation enables optical communications, night vision, health monitoring, spectroscopy and object inspection6. For this reason, many efforts have sought to integrate infrared detection onto silicon to combine infrared sensing with state-of-the-art electronics7. The ideal infrared photodetector must combine a fast response, high responsivity and low power consumption with facile fabrication8. Early efforts in this direction based on epitaxial semiconductors such as III-V and germanium4, 5, 9 added complexity in the fabrication process due to epitaxial crystal growth requirements and the need to mitigate silicon contamination and doping8. Recently, black silicon was reported—an infrared-sensitive material obtained using laser treatment of the silicon surface10, 11, 12. However, this technology suffers from low responsivity (10−2−10−1 A W−1) at infrared wavelengths10. Colloidal quantum dots (CQDs) have enabled photodetectors13 that benefit from infrared sensitivity, high light absorption14, wavelength tunability15, low cost and room-temperature solution processing. However, CQDs have yet to be integrated successfully with silicon. In a heterojunction photodiode16 or traditional photo-field-effect transistor (photo-FET), modest transport in the quantum dot solid limits the performance of the device. A new architecture is required that is not curtailed by the photoconductive effect—a mechanism that produces photodetectors that are either responsive but slow, or fast but unresponsive17. Here we present a Si:CQD photovoltage field-effect transistor (PVFET). It exploits a photovoltage that arises at the Si:CQD interface to control junction electrostatics. As a result, it modulates the conductivity of the silicon channel in proportion to incident light at wavelengths below that of the bandgap of silicon. The Si:CQD PVFET shows high responsivity in the infrared (1,300 nm and 1,500 nm) in excess of 104 A W−1, a response that is faster than 10 μs, and dark current densities of 10−1−101 A cm−2 for a gate–source voltage of V  = 0–3 V. We explain and demonstrate the physical principles that govern the operation of the PVFET using simulations and analytical models, and show the potential of the device when fabricated using the state-of-the-art silicon techniques currently employed in the electronics industry. In Fig. 1a we show the structure of the Si:CQD PVFET. A lightly p−-type silicon channel is epitaxially grown on an n+ silicon substrate that acts as a gate. The channel is contacted with ohmic aluminium source and drain (see Supplementary Information section S1). A thin n-doped CQD film is deposited on top of the silicon channel, creating an infrared-photosensitive gate. The source and drain were covered with a thick layer of insulating silicon nitride to prevent electrical contact between the photogate and the aluminium. The means of deposition of the CQD layer is crucial to the operation of the device. The rectifying Si:CQD junction relies on the passivation of surface traps and providing energetic alignment between the two semiconductors. In the absence of judiciously engineered heterointerface passivation, the two semiconductors fail to produce an efficient rectifying heterojunction16. Figure 1e shows the transverse energy band diagram of the PVFET: the thin (1.6 μm) silicon p-doped layer is sandwiched between two n-type rectifying junctions and is therefore depleted at equilibrium (in the dark). Simulations (Fig. 1c, d) illustrate the working principles of the device. Upon optical illumination using 1,300-nm incident radiation (Fig. 1c), photocarriers are generated exclusively within the CQD solid. This produces a photovoltage at the interface via the photovoltaic effect—the same effect that produces an open-circuit voltage in solar cells. In the PVFET, this effective bias shrinks the depletion region and thereby increases the extent of the (undepleted) channel in the silicon. Figure 1d shows the density of holes (majority carriers) in the silicon channel in the dark and under 1,300-nm illumination. We analyse the operation of the PVFET to further explain the physical mechanisms that govern its behaviour and compare its performance with that of other photodetector architectures (Fig. 2). The gain as a function of the dark current for the PVFET, photodiodes, photoconductors and photo-FETs have been analysed (Fig. 2a). Photoconductors and photo-FETs (that is, previously developed CQD-based phototransistors) are treated together because the gain mechanism that governs these devices is the same: trap-assisted photoconductivity18, 19. Diodes do not produce gain20; photoconductors and photo-FETs have a linear relationship between photoconductive gain G and dark current I : G  = τ /τ , where τ is the trap lifetime and τ is the transit time within the channel, which is related to I through the electrical mobility (see Supplementary Information). The gain can be increased by decreasing the transit time, that is, by using a high-mobility channel (for example, graphene18); however, doing so increases the dark current. In the PVFET, gain is adjusted by tuning the doping of the channel; the effect of the gate allows high gain at low dark current. The gain produced by the PVFET is hν/q × V g /P (see Supplementary Information section S3) where h is the Planck constant, ν is the optical frequency, q is the elemental charge, V is the photovoltage, P is the incident optical power and g is the transconductance of the PVFET, which is defined as g  = dI /dV , where I is the source–drain current. We compared this analytical model to fully self-consistent numerical simulations (TCAD) and found good agreement, especially at high current (Fig. 2a); the analytical model does not accurately capture the subthreshold regime. Gain based on photovoltage and transconductance is distinct from photoconductive gain. It enables simultaneously high signal amplification and rapid response20 (Fig. 2c). Whereas photoconductors and photo-FETs are limited in speed by τ , and rely on traps to produce gain13, the bandwidth of the PVFET is instead determined by the total capacitance, resulting in an operating frequency of f = g /C , where C is the total capacitance. As can be seen in Fig. 2c, whereas gain is generated in photoconductors and photo-FETs at the expense of speed (CQD photo-FETs are typically limited to response times in the range 0.001–1 s owing to the required high values of τ )19, 21, in the PVFET, high gain (high g ) leads to a rapid response time. This gain mechanism allows for a large G  × BW product, as shown in Fig. 2b. Here, we achieve experimentally a G  × BW product of 104 × 105 s−1 and we show (Fig. 2c), using the model of gain and bandwidth (see Supplementary Information section S9 for details of the model), that this value can in principle be further increased towards 105 × 108 s−1. The performance of the PVFET depends strongly on the quality of the Si:CQD rectifying junction (Supplementary Information sections S4, S11 and S12). The photovoltage that arises at the heterojunction interface is crucially determined—as in a solar cell, which also relies on the photovoltaic effect—by the rectification ratio of the junction; therefore, it is important to minimize the reverse saturation current of the junction (see Supplementary Information section S3). The PVFET converts the photovoltage signal to a photocurrent through the transconductance, which, in a junction transistor, also depends on the quality of the heterojunction. A highly rectifying, trap-free heterointerface must be engineered to produce efficient PVFETs. This approach distinguishes the device from previously reported photo-FETs based on CQDs. In these devices, gain comes from trap-assisted photoconduction; that is, the traps provided by the CQD film are responsible for the long lifetime of the photocarriers recirculating in a high-mobility channel (for example, graphene or MoS ). This produces a gain of τ /τ (the ratio between the lifetime of the CQD trap and the transit time of the charge in the channel). These devices do not require a rectifying photogate and their gain arises not from a transistor effect, but from a photoconductive one. We fabricated Si:CQD PVFETs and characterized their performance. First, we investigated the spectral response of the detector. We report the gain (Fig. 3a; defined as the external quantum efficiency, which is given by the ratio between the numbers of photocarriers and incident photons) as a function of the wavelength. The device produces a gain of about 6 × 104 at the exciton. The excitonic peak (at either 1,300 nm or 1,500 nm) is characteristic of the CQD solid, and its energy is determined by the effect of quantum confinement, with greater spatial confinement increasing the effective bandgap of the CQD solid22. In Fig. 3a we compare the detector to a PVFET that lacks a CQD photogate (a silicon-only device), and to black silicon photodetectors12. The sensitivity of the silicon-only device vanishes beyond the bandgap of silicon at 1,100 nm. The gain of the PVFET remains high, owing to the high absorption of the CQD photogate at these longer wavelengths. The comparison with black silicon photodetectors reveals a responsivity at infrared wavelengths that is five orders of magnitude higher in the case of the PVFET. We further characterized the PVFET, measuring its responsivity at 1,300 nm as a function of incident power. The gain of 104 at low intensity begins to roll off near about 2 × 10−5 W cm−2. Figure 3b shows this result, along with that predicted using the analytical model, in which the responsivity is calculated as g V /P . The device exhibits gain compression at high illumination, requiring offline nonlinearity correction, but also enabling increased dynamic range21. The responsivity of the PVFET as a function of V and source–drain voltage V (Fig. 3c) saturates for V  > 2 V, which corresponds to the saturation voltage of the transistor (for voltages higher than the saturation voltage, the transconductance g remains constant; see Supplementary Information section S2), and vanishes for increasing V . Positive V closes the channel (full depletion), which markedly decreases g (ref. 20):   , where G is a constant of the device, V is the built-in voltage of the junction and V is the pinch-off voltage of the PVFET (more details on the static behaviour of the PVFET are provided in Supplementary Information section S2). We proceeded to investigate the temporal response of the detector. Figure 4a, b shows the response of the PVFET to a square wave. It shows fast (10 μs) fall and rise edges of the signal. This component of temporal response is compatible with sensing and imaging, addressing a wide range of consumer applications. The PVFET has a much faster response time than do traditional CQD-based photoconductors (about 100 ms). A slower tail, attributable to defect states in the highly doped silicon substrates and the CQD bulk and interface, is also seen in the experimentally fabricated PVFETs. Removing these electronic states could increase the response time of PVFETs towards 1 GHz (the limit arising from g /C , as shown in Fig. 2), making them competitive with photodiodes and enabling applications such as time-of-flight sensing and machine vision1. In Fig. 4c, the signals acquired from the Si:CQD PVFET and the silicon-only device are compared. The two waveforms representing the response to a 100-kHz excitation are similar, with the PVFET presenting slightly sharper edges. (additional data are provided in Supplementary Information section S6). Notably, the addition of the CQD layer does not affect the transient response of the silicon device: it preserves its original speed, consistent with the fact that the PVFET gain mechanism does not rely on a memory effect from traps. We measured the noise performance of the detector as a function of frequency, and found flicker noise at low frequencies (corner frequency at approximately 100 kHz) and a plateau at high frequencies that approaches the shot-noise limit (Supplementary Information section S5). The CQD photogate does not introduce additional noise to the silicon structure. We measured the noise current and obtained a detectivity of D* = 1.8 × 1012 jones (1 jones = 1 cm Hz1/2 W−1). We also compared the device to previous CQD detectors. If we define a figure of merit that accounts for the responsivity (where BW is the bandwidth), the speed of response and the dark current density J , then the Si:CQD PVFET outperforms previous CQD-based detectors by at least one order of magnitude (Supplementary Information section S7). Traditional CQD-based photo-FETs and photoconductors are outperformed, owing to their lack of bandwidth; CQD diodes, which have a lower I , lack reponsitivity and so have a lower F compared to the PVFET. The Si:CQD PVFET has high gain (>104), even in the infrared (wavelengths of >1,500 nm), high speed (100 kHz) and contained dark current (10−1−101 A cm−2). This performance can be improved further by using advanced silicon processing. The advances reported here were possible only by devising an architecture that combines the benefits of silicon electronics with the emerging potential of CQDs. This architecture leverages a detection mechanism based on the photovoltaic effect combined with transconductive gain.


MALVERN, Pa., Nov. 30, 2016 (GLOBE NEWSWIRE) -- Meeting the need for real-time processor and memory power consumption monitoring in high-performance telecom equipment and datacenter servers, Vishay Intertechnology, Inc. (NYSE:VSH) today introduced two new 60 A VRPower® smart power stages with integrated current and temperature monitors for multi-phase DC/DC systems. Combining power MOSFETs, an advanced driver IC, and a bootstrap FET in the thermally enhanced low-profile 5 mm by 5 mm by 0.66 mm PowerPAK® MLP55-32L / QFN package, the Vishay Siliconix SiC645 and SiC645A simplify designs and deliver higher accuracy than comparable standard DrMOS products while offering a 16 % smaller footprint than similar competing devices.  Unlike solutions that monitor power consumption using inductor DCR sensing — a technique with lower accuracy that requires external components such as a thermistor for temperature compensation — the SiC645 and SiC645A utilize low-side MOSFET R sensing to accurately report current (IMON) and temperature (TMON) using 5 mV/A and 8 mV/C signals, respectively. This method of current sensing is accurate over a wide load range and is internally temperature-compensated, simplifying designs by removing the need for external circuitry. In addition, it eliminates current sense traces while delivering fast performance without noise or external filtering. The power stages’ improved accuracy meets Intel’s stringent VR13 and VR13.x current monitoring accuracy requirements and allows for better utilization of a server CPU’s turbo boost capability, a critical advantage for datacenter customers requiring improved performance without increasing costs. Light-load efficiency is supported by a dedicated low-side FET control pin. The devices offer an input range of 4.5 V to 18 V and are optimized for high-frequency and high-efficiency VRMs and VRDs to power microprocessors and memory for servers, networking, and cloud computing; GPUs in high-performance graphic cards and video game consoles; as well as general purpose multi-phase point-of-load (POL) DC/DC converters. The package of the SiC645 and SiC645A can be cooled on both sides, while low package parasitic resistance and inductance enable high switching frequencies of up to 2 MHz. Fault protection features for the RoHS-compliant, halogen-free devices include high-side FET short and overcurrent protection, over-temperature protection, and undervoltage lockout (UVLO). The power stages feature open drain fault reporting output. The SiC645 and SiC645A support 5 V and 3.3 V PWM tri-level input, respectively, and are compatible with Intersil’s ISL68/69xx and ISL958xx digital multiphase controllers. Samples and production quantities of the smart power stages are available now, with lead times of 10 weeks. Vishay Intertechnology, Inc., a Fortune 1000 Company listed on the NYSE (VSH), is one of the world's largest manufacturers of discrete semiconductors (diodes, MOSFETs, and infrared optoelectronics) and passive electronic components (resistors, inductors, and capacitors). These components are used in virtually all types of electronic devices and equipment, in the industrial, computing, automotive, consumer, telecommunications, military, aerospace, power supplies, and medical markets. Vishay’s product innovations, successful acquisition strategy, and "one-stop shop" service have made it a global industry leader. Vishay can be found on the Internet at www.vishay.com. VRPower and PowerPAK are registered trademarks of Siliconix incorporated. Share it on Twitter: http://twitter.com/intent/tweet?text=.@vishayindust space-saving 60 A VRPower smart power stages increase accuracy while simplifying designs - https://goo.gl/t7VN0O


The team, led by Won-Ju Cho of Kwangwoon University in Seoul, based their device on the 'dual-gate field-effect transistor' (DG FET). When molecules bind on a field-effect transistor, a change happens in the surface's electric charge. This makes FETs good candidates for detecting biological and chemical elements. Dual-gate FETs are particularly good candidates because they amplify this signal several times. But they can still be improved. The team used a method called 'nanoimprint lithography' to fabricate silicon nanowires onto the surface of a DG FET and compared its sensitivity and stability with conventional DG FETs. Field-effect transistors using silicon nanowires have already been drawing attention as promising biosensors because of their high sensitivity and selectivity, but they are difficult to manufacture. The size and position of silicon nanowires fabricated using a bottom-up approach, such as chemical vapor deposition, cannot always be perfectly controlled. Top-down approaches, such as using an electron or ion beam to draw nanorods onto a surface, allow better control of size and shape, yet they are expensive and limited by low throughput. Cho and his colleagues fabricated their silicon nanowires using nanoimprint lithography. In this method, a thin layer of silicon was placed on top of a substrate. This layer was then pressed using a nanoimprinter, which imprints nano-sized wire-shaped lines into the surface. The areas between separate lines were then removed using a method called dry etching, which involves bombarding the material with chlorine ions. The resultant silicon nanowires were then added to a DG FET. The team found that their device was more stable and sensitive than conventional DG FETs. "We expect that the silicon-nanowire DG FET sensor proposed here could be developed into a promising label-free sensor for various biological events, such as enzyme–substrate reactions, antigen–antibody bindings and nucleic acid hybridizations [a method used to detect gene sequences]," conclude the researchers in their study published in the journal Science and Technology of Advanced Materials. More information: Cheol-Min Lim et al. Improved sensing characteristics of dual-gate transistor sensor using silicon nanowire arrays defined by nanoimprint lithography, Science and Technology of Advanced Materials (2017). DOI: 10.1080/14686996.2016.1253409


News Article | December 6, 2016
Site: globenewswire.com

SUNNYVALE, Calif., Dec. 06, 2016 (GLOBE NEWSWIRE) -- Alpha and Omega Semiconductor Limited (AOS) (Nasdaq:AOSL), a designer, developer and global supplier of a broad range of power semiconductors and power ICs, today announced the release of two new products in the 100V MOSFET family, AO4290A and AON6220. These products are designed for synchronous rectification for flyback converters, used in high-speed charger and PD adapters. Both parts are designed to be fully driven with 4.5V gate drive voltage. The AO4290A is offered in an SO-8 package with a maximum on-resistance (Rdson) of  7.6mohm at 4.5V gate drive voltage. The AON6220 is packaged in a low profile DFN5x6 package with a maximum Rdson of 7.4mohm at 4.5V gate drive voltage. The minimum break down voltage is 100V, which is suitable for usage in flyback circuit designs featuring adjustable output voltage, such as an adaptive quick charge for mobile phones and USB PD adapters. A photo accompanying this announcement is available at http://www.globenewswire.com/NewsRoom/AttachmentNg/482fd9b5-d6fb-40fd-83c4-be35d27503a0 High-capacity batteries extend the mobility of the newest smart phones and laptop computers, and have driven the demand for high power chargers and adapters. Synchronous rectification has become the standard circuit design of choice for more and more flyback converters by enabling higher efficiency and lower heat generation while keeping the charger or adapter slim with improved power density. The latest digitally controlled synchronous rectifier ICs provide an option to fully eliminate the Schottky diode paralleled with the synchronous MOSFET. This also requires further reduction of the MOSFET switching loss. The AO4290A and AON6220 are designed to address the demand for higher output power and lower switching loss. With similar specs provided in both the SO-8 and DFN5x6 packages, the design engineer has more flexibility in selecting the right part in accordance with the target thermal dissipation and manufacturing requirements from the PCB factories. ‟The power supply industry sees a tremendous acceleration in the adoption of synchronous rectification in flyback applications. It has been proven to be an effective way of reducing heat generation and achieving a compact design. The evolution in Quick Charge and Direct Charge continues to drive new demand. Furthermore, the standardization of USB Type C is propelling the output power to a higher level. AOS has been the major supplier from the first generation of fast chargers. Our AlphaSGTTM technology provides the solutions for both 5V fixed voltage and 5V/9V/12V/20V adaptive voltage topologies. These two newly released parts will help our partners and customers design high-efficiency flyback converters,” said Lei Feng, Sr. Marketing Director of MOSFET product line at AOS. The following table shows the major specification of the two new parts together with the full 100V AlphaSGTTM family offered for SR FET in flyback converters. All the products released are immediately available in production quantities with a lead-time of 12-14 weeks. The unit price for 1,000 pieces are shown below: Alpha and Omega Semiconductor Limited, or AOS, is a designer, developer and global supplier of a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT and Power IC products. AOS has developed extensive intellectual property and technical knowledge that encompasses the latest advancements in the power semiconductor industry, which enables us to introduce innovative products to address the increasingly complex power requirements of advanced electronics. AOS differentiates itself by integrating its Discrete and IC semiconductor process technology, product design, and advanced packaging know-how to develop high-performance power management solutions. AOS's portfolio of products targets high-volume applications, including portable computers, flat panel TVs, LED lighting, smart phones, battery packs, consumer and industrial motor controls and power supplies for TVs, computers, servers and telecommunications equipment. For more information, please visit www.aosmd.com. This press release contains forward-looking statements that are based on current expectations, estimates, forecasts and projections of future performance based on management's judgment, beliefs, current trends, and anticipated product performance. These forward-looking statements include, without limitation, references to the efficiency and capability of new products, and the potential to expand into new markets. Forward-looking statements involve risks and uncertainties that may cause actual results to differ materially from those contained in the forward-looking statements. These factors include, but are not limited to, the actual product performance in volume production, the quality and reliability of the product, our ability to achieve design wins, the general business and economic conditions, the state of the semiconductor industry, and other risks as described in the Company's annual report and other filings with the U.S. Securities and Exchange Commission. Although the Company believes that the expectations reflected in the forward-looking statements are reasonable, it cannot guarantee future results, level of activity, performance, or achievements. You should not place undue reliance on these forward-looking statements. All information provided in this press release is as of today's date, unless otherwise stated, and AOS undertakes no duty to update such information, except as required under applicable law.


News Article | February 28, 2017
Site: www.acnnewswire.com

Silicon nanowires fabricated using an imprinting technology could be the way of the future for transistor-based biosensors. Korean researchers are improving the fabrication of transistor-based biosensors by using silicon nanowires on their surface. The team, led by Won-Ju Cho of Kwangwoon University in Seoul, based their device on the 'dual-gate field-effect transistor' (DG FET). When molecules bind on a field-effect transistor, a change happens in the surface's electric charge. This makes FETs good candidates for detecting biological and chemical elements. Dual-gate FETs are particularly good candidates because they amplify this signal several times. But they can still be improved. The team used a method called 'nanoimprint lithography' to fabricate silicon nanowires onto the surface of a DG FET and compared its sensitivity and stability with conventional DG FETs. Field-effect transistors using silicon nanowires have already been drawing attention as promising biosensors because of their high sensitivity and selectivity, but they are difficult to manufacture. The size and position of silicon nanowires fabricated using a bottom-up approach, such as chemical vapor deposition, cannot always be perfectly controlled. Top-down approaches, such as using an electron or ion beam to draw nanorods onto a surface, allow better control of size and shape, yet they are expensive and limited by low throughput. Cho and his colleagues fabricated their silicon nanowires using nanoimprint lithography. In this method, a thin layer of silicon was placed on top of a substrate. This layer was then pressed using a nanoimprinter, which imprints nano-sized wire-shaped lines into the surface. The areas between separate lines were then removed using a method called dry etching, which involves bombarding the material with chlorine ions. The resultant silicon nanowires were then added to a DG FET. The team found that their device was more stable and sensitive than conventional DG FETs. "We expect that the silicon-nanowire DG FET sensor proposed here could be developed into a promising label-free sensor for various biological events, such as enzyme-substrate reactions, antigen-antibody bindings and nucleic acid hybridizations [a method used to detect gene sequences]," conclude the researchers in their study published in the journal Science and Technology of Advanced Materials. Article information Cheol-Min Lim, In-Kyu Lee, Ki Joong Lee, Young Kyoung Oh, Yong-Beom Shin and Won-Ju Cho. Improved sensing characteristics of dual-gate transistor sensor using silicon nanowire arrays defined by nanoimprint lithography. Science and Technology of Advanced Materials, 2016; 18:1, 17-25. http://dx.doi.org/10.1080/14686996.2016.1253409 For further information please contact: Professor Won-Ju Cho*, Department of Electronic Materials Engineering, Kwangwoon University, Korea *E-mail: Journal information Science and Technology of Advanced Materials (STAM), http://www.tandfonline.com/STAM) is an international open access journal in materials science. The journal covers a broad spectrum of topics, including synthesis, processing, theoretical analysis and experimental characterization of materials. Emphasis is placed on the interdisciplinary nature of materials science and on issues at the forefront of the field, such as energy and environmental issues, as well as medical and bioengineering applications. For more information about STAM contact Mikiko Tanifuji Publishing Director Science and Technology of Advanced Materials E-mail: Press release distributed by ResearchSEA for Science and Technology of Advanced Materials.


NEW YORK, March 2, 2017 /PRNewswire/ -- Today, Stock-Callers.com features Flotek Industries Inc. (NYSE: FTK), Forum Energy Technologies Inc. (NYSE: FET), NOW Inc. (NYSE: DNOW), and MRC Global Inc. (NYSE: MRC). These stocks are part of the Oil and Gas Equipment and Services space which...


News Article | November 2, 2016
Site: www.cemag.us

Type 1 diabetes patients may one day be able to monitor their blood glucose levels and even control their insulin infusions via a transparent sensor on a contact lens, a new Oregon State University study suggests. The sensor uses a nanostructured transistor — specifically an amorphous indium gallium oxide field effect transistor, or IGZO FET — that can detect subtle glucose changes in physiological buffer solutions, such as the tear fluid in eyes. Type 1 diabetes, formerly known as juvenile diabetes, can lead to serious health complications unless glucose levels are carefully controlled. Problems can include retinopathy, blindness, neuropathy, kidney and cardiac disease. Researchers in the OSU College of Engineering say sensors they fabricated using the IGZO FET will be able to transmit real-time glucose information to a wearable pump that delivers the hormones needed to regulate blood sugar: insulin and glucagon. The sensor and pump would, in effect, act as an artificial pancreas. “We have fully transparent sensors that are working,” says Greg Herman, an OSU professor of chemical engineering and corresponding author on this study. “What we want to do next is fully develop the communication aspect, and we want to use the entire contact lens as real estate for sensing and communications electronics. “We can integrate an array of sensors into the lens and also test for other things: stress hormones, uric acid, pressure sensing for glaucoma, and things like that. We can monitor many compounds in tears — and since the sensor is transparent, it doesn’t obstruct vision; more real estate is available for sensing on the contact lens.” The FET’s closely packed, hexagonal, nanostructured network resulted from complimentary patterning techniques that have the potential for low-cost fabrication. Those techniques include colloidal nanolithography and electrohydrodynamic printing, or e-jet, which is somewhat like an inkjet printer that creates much finer drop sizes and works with biological materials instead of ink. The findings by postdoctoral scholar Xiaosong Du, visiting scholar Yajuan Li and,Herman were recently published online in the journal Nanoscale. The Juvenile Diabetes Research Foundation provided primary funding for the research. Google has been working on a glucose-monitoring contact lens but its version is not fully transparent. “It’s an amperometric sensor and you can see the chips — that means it has to be off to the side of the contact lens,” Herman says. “Another issue is the signal is dependent on the size of the sensor and you can only make it so small or you won’t be able to get a usable signal. With an FET sensor, you can actually make it smaller and enhance the output signal by doing this.” This research builds on earlier work by Herman and other OSU engineers that developed a glucose sensor that could be wrapped around a catheter, such as one used to administer insulin from a pump. “A lot of type 1 diabetics don’t wear a pump,” Herman says. “Many are still managing with blood droplets on glucose strips, then using self-injection. Even with the contact lens, someone could still manage their diabetes with self-injection. The sensor could communicate with your phone to warn you if your glucose was high or low.” The transparent FET sensors, Herman says, might ultimately be used for cancer detection, by sensing characteristic biomarkers of cancer risk. Their high sensitivity could also measure things such as pulse rate, oxygen levels, and other aspects of health monitoring that require precise control.


The charge transport and microstructural properties of five different molecular weight (MW) batches of the naphthalenediimide-thiophene copolymer P(NDI2OD-T2) are investigated. In particular, the field-effect transistor (FET) performance and thin-film microstructure of samples with MW varying from M = 10 to 41 kDa are studied. Unlike conventional semiconducting polymers such as poly(3-hexylthiophene) where FET mobility dramatically drops with decreasing molecular weight, the FET mobility of P(NDI2OD-T2)-based transistors processed from 1,2-dichlorobenzene is found to increase with decreasing MW. Using a combination of grazing-incidence wide-angle X-ray scattering, near-edge X-ray absorption fine-structure spectroscopy, atomic force microscopy, and resonant soft X-ray scattering, the increase in FET mobility with decreasing MW is attributed to the pronounced increase in the orientational correlation length (OCL) with decreasing MW. In particular, the OCL is observed to systematically increase from <100 nm for the highest MW samples to ≈1 µm for the lowest MW samples. The improvement in OCL and hence mobility for low MW samples is attributed to the lack of aggregation of low MW chains in solution promoting backbone ordering, with the pre-aggregation of chains in 1,2-dichlorobenzene found to suppress longer-range liquid crystalline order.


News Article | March 1, 2017
Site: www.techradar.com

The long awaited is finally here, and it’s a doozy of a graphics card. Packing 12-billion transistors and 3,584 CUDA (Compute Unified Device Architecture) cores, it’s one of Nvidia’s most impressive graphics cards yet. What’s more, Nvidia has engineered the GPU’s 11GB of GDDR5X RAM to operate at an even higher 11Gbps compared to Pascal GPUs – including the – that only went as high as 10Gbps. Nvidia’s highest-end gamer-focused GPU also can overclock to 2GHz and has a boosted frequency of 1.6GHz. That makes it a hair quicker than even the Nvidia Titan X that normally operates at 1.5GHz. All of this amounts to what Nvidia claims is its best Ti card, offering a 35% increase in performance over the original . The GPU maker isn’t leaving its older models in the dust with this reveal, and has announced it will launch overclocked versions of the Nvidia GTX 1080 packing 11Gbps G5X memory and a with 9Gbps G5 VRAM. The GeForce GTX 1080 Ti also features a re-engineered power design with a 7-phase dual field-effect transistor (FET) and 14 dual-FETs architecture. Combined with a vapor chamber and double the amount of cooling area, the graphics card runs 5-degrees Celsius cooler and 2.5 decibels quieter than the original. As with Nvidia’s previous GPUs, the 1080 Ti will be first available in a Founders Edition directly from Nvidia with vendor models from MSI, Asus and others coming later. The Nvidia GTX 1080 Ti will be released on next week for $699 (about £560, AU$910). Stay tuned for our full review of Nvidia's latest titanic graphics card.


News Article | February 20, 2017
Site: www.businesswire.com

HOUSTON--(BUSINESS WIRE)--Forum Energy Technologies, Inc. (NYSE:FET) announced today that as part of a long planned transition its Board of Directors appointed Mr. Prady Iyyanki as President and Chief Executive Officer, effective May 16, 2017. Mr. Iyyanki currently serves as President and Chief Operating Officer. Mr. C. Christopher Gaut, the current Chief Executive Officer, will become Executive Chairman. The Board has also nominated Mr. Iyyanki to stand for election as a director at the 2017 Annual Meeting of Stockholders Meeting in May. Cris Gaut commented, “It has been a privilege to serve as Chairman and CEO of Forum since its inception six and a half years ago. Three years ago we brought Prady on board to create a more professional, streamlined, and efficient organization that was capable of becoming a force to be reckoned with in the oilfield manufacturing space. Since then he has proven himself at every turn to be an excellent leader with strong business judgement. I was pleased to recommend this move to our Board, and I look forward to the continued growth and prosperity of the company under Prady’s leadership.” “I am honored to lead Forum into its next chapter,” said Prady Iyyanki. “Cris successfully set the direction for Forum’s business and financial strategy, led the transition to being a public company and built a firm foundation of trust with our investors and customers. He established Forum as a strong competitor within the oilfield equipment manufacturing sector, and has proven to be an excellent mentor for me and many others. In his new position, he will continue to be actively involved with our larger strategic matters, as well as acquisition and capital markets efforts. I look forward to continuing my strong partnership with Cris.” Prady joined Forum in 2014 after sixteen years of experience with General Electric (GE) in various senior management roles. He served as President and CEO of GE Genbacher/Gas Engines from 2006 – 2011 and President and CEO of Turbomachinery Equipment from 2011 – 2012. He has a Bachelor of Science in Engineering from Jawaharlal Nehru Technology University, India and a Master of Science in Engineering from South Dakota State University. Forum Energy Technologies is a global oilfield products company, serving the drilling, subsea, completions, production and infrastructure sectors of the oil and natural gas industry. The Company’s products include highly engineered capital equipment as well as products that are consumed in the drilling, well construction, production and transportation of oil and natural gas. Forum is headquartered in Houston, TX with manufacturing and distribution facilities strategically located around the globe. For more information, please visit www.f-e-t.com.

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