San Jose, CA, United States
San Jose, CA, United States

Fairchild Semiconductor International, Inc. is an American semiconductor company based in San Jose, California. Originally founded in 1957 as a division of Fairchild Camera and Instrument, it became a pioneer in the manufacturing of transistors and of integrated circuits. Schlumberger bought the firm in 1979 and sold it to National Semiconductor in 1987; Fairchild was spun off as an independent company again in 1997.The company has locations in the United States of America at San Jose, California; South Portland, Maine; West Jordan, Utah; Mountaintop, Pennsylvania. Outside the U.S. it operates locations in Singapore; Bucheon, South Korea; Penang, Malaysia; Suzhou, China; and Cebu, Philippines; among others. A design center has been launchedTemplate:By whom? in Pune, India. Wikipedia.


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Patent
Fairchild Semiconductor | Date: 2016-08-19

A superjunction semiconductor device includes a first semiconductor layer doped with a first conductivity type; an active region formed on the first semiconductor layer, the active region including a drift layer; and a termination region disposed to surround the active region, the termination region including a lower edge region disposed on a side surface of the drift layer and an upper edge region disposed on the lower edge region, wherein the upper edge region includes a lower charge balance region disposed on the lower edge region, the lower charge balance region having a second conductivity type different from the first conductivity type, and an upper charge balance region disposed on the lower charge balance region, the upper charge balance region having the first conductivity type.


Patent
Fairchild Semiconductor | Date: 2016-11-14

This document discusses, among other things, an audio jack detection switch configured to be coupled to first and second GND/MIC terminals of an audio jack, wherein the audio jack detection switch includes a detection circuit configured to measure an impedance on the first and second GND/MIC terminals and identify each GND/MIC terminal as either a GND pole or a MIC pole using the measured impedance, and wherein the audio jack detection switch includes a switch configured to automatically couple an identified MIC pole to a MIC connection and to automatically couple an identified GND pole to a GND connection using information from the detection circuit.


Patent
Fairchild Semiconductor | Date: 2016-08-26

An AC-DC converter includes a main switch that is controlled according to an input AC line voltage. The main switch is allowed to be switched when a level of the input AC line voltage is within a regulation band, and is prevented from being switched when the level of the input AC line voltage is not within the regulation band. The regulation band can be dynamically adjusted based on load condition. The AC-DC converter can be a buck, boost, or buck-boost converter.


Patent
Fairchild Semiconductor | Date: 2017-01-03

In one general aspect, a method of fabricating a power device can include preparing a semiconductor substrate of a first conductivity type, and forming a first Field Stop (FS) layer and a second FS layer.


Patent
Fairchild Semiconductor | Date: 2016-10-28

A power semiconductor device includes: a substrate; an anode electrode and a cathode electrode disposed on the substrate; a well region disposed inside the substrate in a lower portion of the anode electrode, and having p-type conductivity; an NISO region disposed in a lower portion of the well region inside the substrate, and having a first n-type impurity concentration; and an n-type buried layer disposed in a lower portion of the NISO region, and having a second impurity concentration greater than the first n-type impurity concentration, inside the substrate.


Choi H.,Fairchild Semiconductor
IEEE Transactions on Power Electronics | Year: 2013

An interleaved boundary conduction mode powerfactor- correction buck converter that maintains high efficiency across entire load and line range is proposed. The adaptive master. slave interleaving method maintains stable 180. out-of-phase operation during any transient. By interleaving two parallel-connected buck converters, the input current ripple is halved while the ripple frequency is doubled, which leads to a smaller differential mode line filter. The line current harmonic distortion is analyzed to examine the allowable output voltage range while meeting harmonic regulations. The operation and performance of the proposed circuit is verified on a 300 W, universal line experimental prototype with 80 V output. The measured efficiencies remain above 96%down to 20%of full load across the entire universal line range. Even at 10%of full-load condition, the efficiency remains above 94%. The input current harmonics also meet the IEC61000-3-2 (class D) standard. © 2013 IEEE.


Patent
Fairchild Semiconductor | Date: 2016-06-29

Provided is a buck converter. The converter includes a power switch configured to receive and switch an input voltage and convert the input voltage into an output voltage, and a switch control circuit configured to generate a signal having a frequency synchronized with the input voltage, compensate for the signal by using an edge threshold voltage in an edge area of the signal according to at least one of a load state and the input voltage, and control switching of the power switch by using a result of comparing the signal with a band voltage corresponding to the output.


Patent
Fairchild Semiconductor | Date: 2016-06-29

A buck converter includes a power switch having a first end to receive an input voltage, a synchronous switch connected between a second end of the power switch and the ground, an inductor having a first end connected to the other end of the power switch, and a switch control circuit configured to turn off the synchronous switch when a zero voltage delay time passes after an inductor current flowing through the inductor reaches a predetermined reference value, calculate a dead time based on the input voltage and the zero voltage delay time, and turn on the power switch when the dead time passes following the turn-off time of the synchronous switch.


Patent
Fairchild Semiconductor | Date: 2016-06-29

A buck converter includes a power switch having a first end to receive an input voltage, and a soft start circuit configured to compensate a soft start voltage during a soft start time period according to a result of comparing a feedback voltage corresponding to an output voltage of the buck converter and an input detection voltage corresponding to the input voltage. The buck converter controls switching of the power switch using the soft start voltage.


Patent
Fairchild Semiconductor | Date: 2016-06-29

A buck converter includes a power switch having one end to which an input voltage is transferred, a synchronous switch connected between the other end of the power switch and the ground, an inductor having an end connected to the other end of the power switch, and a switch control circuit configured to calculate a zero voltage delay time based on at least an ON time of the power switch and a delay time. The delay time is determined based on the inductor and parasitic capacitors of the power switch and the synchronous switch.

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