Ev Group E Thallner Gmbh

Sankt Florian am Inn, Austria

Ev Group E Thallner Gmbh

Sankt Florian am Inn, Austria
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Patent
Ev Group E Thallner Gmbh | Date: 2017-03-15

The invention relates to a device for supplying at least one substrate (7) with a plasma, said device comprising a first electrode (1) and a second electrode (12) which can be disposed opposite the first electrode, said electrodes being designed jointly to generate the plasma between the electrodes (1, 12), characterised in that at least one of the electrodes (1, 12) is formed by at least two electrode units (2, 3). The invention further relates to a corresponding method.


Patent
Ev Group E Thallner Gmbh | Date: 2017-05-03

The invention relates to a method for treating an at least predominantly crystalline surface (10, 10) of a substrate (1, 1) in such a way that amorphization of the substrate surface (10, 10) results in the formation of an amorphous layer (2, 2, 2) on the substrate surface (10, 10), said amorphous layer (2, 2, 2) having a thickness d > 0 nm. The invention further relates to a corresponding device.


Patent
Ev Group E Thallner Gmbh | Date: 2017-05-03

The present invention relates to a method for applying a silicon dioxide layer (3, 3) onto a flammable and/or, in particular, easily flammable carrier material (2, 2) for forming packaging (1, 1) suitable in particular for foodstuffs, comprising the following steps, in particular the following process: coating of the carrier material (2, 2) with a silicon dioxide precursor solution, which is prepared in a solvent by dissolving a silicate, in particular an oligomeric silicate, preferably a silicic acid tetramethyl ester homopolymer, having a water content < 5 vol. %, and hardening of the silicon dioxide precursor solution, and thereby forming the silicon dioxide layer (3, 3) on the carrier material (2, 2) in an at least partially vaporous ammonia atmosphere at: c) a temperature of between 5 C and 30 C and/or d) a pressure of between 900 MPa and 1200 MPa.


Patent
Ev Group E Thallner Gmbh | Date: 2017-02-24

A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.


Patent
Ev Group E Thallner Gmbh | Date: 2017-03-15

The invention relates to a method for permanently bonding a first layer (2) of a first substrate (1) to a second layer (2) of a second substrate (1) at a bonding boundary surface (5), characterized in that a density of dislocations (4) in the first and/or second layers (2, 2) is increased at least in the region of the bonding boundary surface (5) prior to and/or during the bonding process. The invention further relates to a corresponding device.


Patent
Ev Group E Thallner Gmbh | Date: 2017-03-08

The present invention relates to a method for evening out the thickness variation of a substrate stack (1) by locally impacting local thickness maxima (12) by means of at least one impacting apparatus (11, 11, 11) that has at least one impacting unit (9, 9, 9, 9, 9IV, 9V, 9VI), said substrate stack consisting of a product substrate (4) and a carrier substrate (2) and said substrates being particularly connected by means of a connecting layer (3). The invention further relates to a corresponding device.


Patent
Ev Group E Thallner Gmbh | Date: 2017-03-01

The present invention relates to a method for embossing a nanostructure (13) from a nanostructure stamp (5) into a stamp face (14) of a curable material (8) applied on a substrate (7) with the following steps, in particular in the following sequence: aligning the nanostructure (13) with respect to the stamp face (14), embossing the stamp face (14) by A) preloading the nanostructure stamp (5) by deforming the nanostructure stamp (5) and/or preloading the substrate (7) by deforming the substrate (7), B) contacting a partial area (15) of the stamp face (14) with the nanostructure stamp (5), and C) automatic contacting of the remaining area (16) at least partially, in particular predominantly, by the preloading of the nanostructure stamp (5) and/or the preloading of the substrate (7).


Patent
Ev Group E Thallner Gmbh | Date: 2017-02-01

The invention relates to a method for temporarily coating cavities (2), with which a semiconductor substrate (1) is at least partially interspersed and which are intended for a permanent coating and/or component mounting, with a temporarily applied coating material (3) before processing steps for processing at least one surface (1o) of the semiconductor substrate (1). The invention further relates to a method for removing a temporary coating from cavities (2) of a semiconductor substrate (1), wherein the coating has been or is applied according to an aforementioned method and wherein thereafter, in particular immediately thereafter, a permanent coating and/or component mounting of the cavities (2) occurs.


Grant
Agency: European Commission | Branch: H2020 | Program: ECSEL-IA | Phase: ECSEL-02-2014 | Award Amount: 139.30M | Year: 2015

The proposed pilot line project WAYTOGO FAST objective is to leverage Europe leadership in Fully Depleted Silicon on Insulator technology (FDSOI) so as to compete in leading edge technology at node 14nm and beyond preparing as well the following node transistor architecture. Europe is at the root of this breakthrough technology in More Moore law. The project aims at establishing a distributed pilot line between 2 companies: - Soitec for the fabrication of advanced engineered substrates (UTBB: Ultra Thin Body and BOx (buried oxide)) without and with strained silicon top film. - STMicroelectronics for the development and industrialization of state of the art FDSOI technology platform at 14nm and beyond with an industry competitive Power-Performance-Area-Cost (PPAC) trade-off. The project represents the first phase of a 2 phase program aiming at establishing a 10nm FDSOI technology for 2018-19. A strong added value network is created across this project to enhance a competitive European value chain on a European breakthrough and prepare next big wave of electronic devices. The consortium gathers a large group of partners: academics/institutes, equipment and substrate providers, semiconductor companies, a foundry, EDA providers, IP providers, fabless design houses, and a system manufacturer. E&M will contribute to the objective of installing a pilot line capable of manufacturing both advanced SOI substrates and FDSOI CMOS integrated circuits at 14nm and beyond. Design houses and electronics system manufacturer will provide demonstrator and enabling IP, to spread the FDSOI technology and establish it as a standard in term of leading edge energy efficient CMOS technology for a wide range of applications battery operated (consumer , healthcare, Internet of things) or not. Close collaboration between the design activities and the technology definition will tailor the PPAC trade-off of the next generation of technology to the applications needs.


Grant
Agency: European Commission | Branch: H2020 | Program: IA | Phase: NMP-04-2014 | Award Amount: 7.93M | Year: 2015

Roll-to-roll (R2R) technologies are mature core processes in manufacturing lines for graphical printing industry. In several other areas (e.g. electronics or optics) R2R techniques are emerging, being expected to notably lower the unit prices of flexible devices. In particular, recently developed roller-based nanoimprinting methods enable unrivalled throughput and productivity for precise fabrication of micro- and nanoscale patterns. Areas that will benefit strongly from adopting such R2R nanoimprinting technologies are microfluidics and lab-on-chip products for diagnostics, drug discovery and food control. Such devices require combined printing of micro- and nanostructures and large quantities at low unit costs. The project R2R Biofluidics aims on the development of a complete process chain for first-time realization of production lines for two selected bioanalytical lab-on-chip devices based on high-throughput R2R nanoimprinting in combination with complementary printing and manufacturing technologies. Two types of demonstrators will be fabricated targeting application areas, which would clearly benefit from technology advancement in high volume manufacturing, show large potential for commercial exploitation and adopt current standard formats (microtiter plate and microscope slides). Demonstrator 1 will represent an in-vitro diagnostic (IVD) chip suitable for point-of-care applications, showing improved sensitivity thanks to imprinted nanoscale optical structures and microfluidic channels. R2R fabrication will further greatly reduce production costs and increase manufacturing capacity with respect to currently used products. Demonstrator 2 will provide a device for improved neuron based high-throughput screening assays in drug development. It will consist of nano to microstructured, interconnected channels in combination with dedicated biofunctionalized surfaces for alignment and controlled growth of neurons.

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