Entity

Time filter

Source Type

San Diego, CA, United States

A cascadable AGC amplifier in a signal distribution system includes a low noise cascadable amplifier having a through path and a cascadable output. The cascadable amplifier is also configured to provide AGC over a predetermined input power range. The cascadable AGC amplifier can be configured to provide gain or attenuation. When the cascadable AGC amplifier is implemented in a signal distribution system, typically as part of a signal distribution device, an input signal can be gain controlled and supplied to multiple signal paths without distortion due to degradation of signal to noise ratio or distortion due to higher order amplifier products. The distributed signal is not significantly degraded by distortion regardless of the number of cascadable AGC amplifiers connected in series or the position of the cascadable AGC amplifier in the signal distribution system.


Patent
Entropic | Date: 2015-08-14

A method for extracting low-resolution video from compressed high-resolution video is disclosed. First, a video, comprising high-resolution frames encoded with a predictive coding technique, is input. At least one of the high-resolution frames is a reference frame. The reference frame is down-sampled to produce a first low-resolution frame with a first DC coefficient. Frequency coefficients corresponding to the first low-resolution frame are generated. Then, a second low-resolution frame is generated according to the frequency coefficients and the first low-resolution frame, the second low-resolution frame having a second DC coefficient. A residual error corresponding to the second low-resolution frame is generated. Finally, a third low-resolution frame is generated according to the frequency coefficients, the first low-resolution frame, and the residual error. A third DC coefficient for the third low-resolution frame is determined according to a weighted average of at least the first DC coefficient and the second DC coefficient.


Patent
Entropic | Date: 2015-12-01

Systems and methods are provided for removing interference from received signals. An interference control signal may be generated in a transceiver during transmission and reception of signals. The interference control signal may be generated based on a first interference control input corresponding to an input signal used in generating the transmitted signals, and a second interference control input corresponding to a model of a leakage of the transmitted signals onto the received signals. The model may be based on a first approximation of a transfer function for the leakage. The interference control signal may be combined with an intermediate signal generated during processing of the received signals, to generate a corresponding combined signal, and the combined signal may be applied during processing of the received signals.


Systems and methods are provided for selecting data from intermediate frequency signals, corresponding to received signals (e.g., satellite signals) carrying modulated data, using digital channelizer switches. An example digital channelizer switch may comprise a plurality of high speed analog-to-digital converters configured to digitize the intermediate frequency signals; a plurality of digital channelizers configured to digitally tune data from the digitized intermediate frequency signals; a multiplexer configured to select one or more digitized intermediate frequency signal generated by the plurality of high speed analog-to-digital converters as inputs to the plurality of digital channelizers; and a high speed digital-to-analog converter configured to generate an analog output signal using digitally tuned data by the digital channelizer, from at least one digitized intermediate frequency signal.


Patent
Entropic | Date: 2016-01-12

Methods and systems for integrated circuit design using dynamic voltage scaling may comprise (a) designing an IC to meet a voltage dependent frequency specification, the IC design including feedback circuitry for controlling a power supply voltage to a fabricated instance of the IC design, (b) characterizing a fabrication process for corner lots for the IC design at a range of power supply voltage levels achievable by the feedback circuitry; (c) validating the IC design against the fabrication process if the frequency specification is achievable for essentially all instances of the IC design fabricated, wherein the feedback circuitry in each IC resulting from the IC design is operable to respectively adjust the power supply voltage of each IC resulting from the IC design by reducing the power supply voltage if the IC is from a fast corner lot and increasing power supply voltage if from a slow corner lot.

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