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Raghupathy A.,Electronic Cooling Solutions Inc. | Hoa D.,Xilinx Inc. | Philofsky B.,Xilinx Inc. | Refai-Ahmed G.,Xilinx Inc.
2015 International 3D Systems Integration Conference, 3DIC 2015 | Year: 2015

This paper presents a couple of new methodologies regarding package characterization. An important shortcoming of the JEDEC methodology for single-die packages is that it does not account for the real-world scenario of a package's boundary condition. A new methodology is proposed to overcome this shortcoming by accounting for typical PCB conductivities and heatsink attachments to packages. The second methodology, presented in the paper, shows a better way to develop DELPHI-based boundary condition independent compact thermal models for 2.5D packages with multiple dies mounted on an interposer. This methodology, based on DELPHI-based techniques, accounts for the interaction between the multiple dies in a package. This is done by modifying the resistors generated from the optimization process. A number of verification cases show good fidelity of the compact thermal model to the detailed model. © 2015 IEEE. Source


Raghupathy A.P.,Electronic Cooling Solutions Inc. | Shen J.,Ericsson AB
Annual IEEE Semiconductor Thermal Measurement and Management Symposium | Year: 2010

The current work presents a comparative study of industry-wide practice of modeling opto-electronic packages for their thermal analysis, with a focus on the DELPHI-type model. A single opto-electronic package that has a representative construction of other types of opto-electronic packages is chosen for this study. This package is Small-Form Factor Pluggable device, commonly referred to as the SFP. Based on the required level of accuracy and computational resources consumed, the SFP is modeled using one of the following techniques; a lumped system of fixed thermal conductivity, a two-resistor network model, a multi-resistor DELPHI-type network model and a detailed geometrical model. In the current study, these modeling techniques are studied in a comparative mode. The performances of the different models are compared to a validated detailed model. Boundary conditions used for comparing the different models with the detailed model is decided based on practical situations commonly encountered by SFPs in system-level models. The practical situations also include cage-level installation of the SFPs. In addition to presenting the performance of each modeling technique with respect to the detailed model, discussion on their advantages and limitations are also included in this paper. ©2010 IEEE. Source


Shen J.,Ericsson AB | Raghupathy A.P.,Electronic Cooling Solutions Inc.
Annual IEEE Semiconductor Thermal Measurement and Management Symposium | Year: 2010

Small Form-factor Pluggable (SFP) transceivers are commonly used in fiber optics based networks. Detailed CFD model demands a lot of mesh counts and is computationally prohibitive in system and board level simulations. In the present study, detailed SFP models have been simulated at 24 different boundary conditions consisted of four system airflow velocities, three power dissipations and two PCB board thermal conductivities. A two-resistor compact model has been derived based on the simulated heat fluxes and case temperatures of detailed SFP models. The case temperatures simulated from two-resistor model are benchmarked to the results from detailed SFP model. The two-resistor model has been compared with detailed SFP and DELPHI models strictly under the same condition. It has been shown with consistent accuracy. The advantages of using this model lie on modeling simplicity requiring the least grid resolution, easy scalability to different power dissipations, and great compatibility of various SFP packages. The limitations of two-resistor model are discussed at the end. ©2010 IEEE. Source


Raghupathy A.P.,University of Cincinnati | Ghia U.,University of Cincinnati | Ghia K.,University of Cincinnati | Maltz W.,Electronic Cooling Solutions Inc.
Journal of Heat Transfer | Year: 2010

This technical note presents an introduction to boundary-condition-independent reduced-order modeling of complex electronic components using the proper orthogonal decomposition (POD)-Galerkin approach. The current work focuses on how the POD methodology can be used along with the finite volume method to generate reduced-order models that are independent of their boundary conditions. The proposed methodology is demonstrated for the transient 1D heat equation, and preliminary results are presented. © 2010 by ASME. Source


Litvinovitch V.,BAE Systems | Wang P.,Electronic Cooling Solutions Inc. | Bar-Cohen A.,University of Maryland University College
IEEE Transactions on Components and Packaging Technologies | Year: 2010

Proposed uses of solid-state thermoelectric microcoolers for hot spot remediation have included the formation of a superlattice layer on the back of the microprocessor chip, but there have been few studies on the cooling performance of such devices. This paper provides the results of 3-D, electrothermal, finite element modeling of a superlattice microcooler, focusing on the hot spot temperature and superlattice surface temperature reductions, respectively. Simulated temperature distributions and heat flow patterns in the silicon, associated with variations in microcooler geometry, chip thickness, hot spot size, hot spot heat flux, and superlattice thickness are provided. Comparison is made to hot spot cooling achieved by the Peltier effect in the silicon microprocessor chip itself. The numerical results suggest that, for a variety of operating conditions and geometries, while increasing the superlattice thickness serves to decrease the exposed superlattice surface temperature, it is ineffective in reducing the hot spot temperature below that due to the silicon Peltier effect. © 2006 IEEE. Source

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