DSP Group, Inc. is a provider of chipsets for VoIP, multimedia, and digital cordless applications. Founded in 1987 with headquarters in San Jose, California, DSP Group employs over 400 people at three US sites and offices in Germany, Scotland, Israel, India, Hong Kong and Japan. Wikipedia.
Studer C.,DSP Group |
Fateh S.,ETH Zurich |
Seethaler D.,Robart Inc.
IEEE Journal of Solid-State Circuits | Year: 2011
Multiple-input multiple-output (MIMO) technology is the key to meet the demands for data rate and link reliability of modern wireless communication systems, such as IEEE 802.11n or 3GPP-LTE. The full potential of MIMO systems can, however, only be achieved by means iterative MIMO decoding relying on soft-input soft-output (SISO) data detection. In this paper, we describe the first ASIC implementation of a SISO detector for iterative MIMO decoding. To this end, we propose a low-complexity minimum mean-squared error (MMSE) based parallel interference cancellation algorithm, develop a suitable VLSI architecture, and present a corresponding four-stream 1.5 mm2 detector chip in 90 nm CMOS technology. The fabricated ASIC includes all necessary preprocessing circuitry and exceeds the 600 Mb/s peak data-rate of IEEE 802.11n. A comparison with state-of-the-art MIMO-detector implementations demonstrates the performance benefits of our ASIC prototype in practical system-scenarios. © 2011 IEEE. Source
DSP Group | Date: 2014-06-09
A method for transferring messages to wireless communication device, the method may include receiving, by an intermediate device, from a upstream device, a certain message awaiting indication that is indicative that a certain message is waiting to be sent to a certain wireless communication device; detecting, by the intermediate device, that the certain wireless communication device is in a wireless communication facilitating mode; requesting the certain wireless communication device, to re-enter the wireless communication facilitating mode at a certain time frame; retrieving the certain message from the upstream device; detecting, by the intermediate device, that the certain wireless communication device re-entered the wireless communication facilitating mode at the certain time frame; and wirelessly transmitting the certain message to the certain wireless communication device.
DSP Group | Date: 2014-07-31
A method that includes operating a base station at a first operational mode thereby preventing the base station from a periodically transmitting a beacon; detecting, by the base station, a transmission from a first wireless communication device; determining, by the base station and in response to the transmission from the first wireless communication device, whether to continue operating in the no emission mode or to enter a emission mode during which the base station is allowed to transmit the beacon; and entering the second operational mode, if it is determined to enter the second operational mode, and sending the beacon to the first wireless communication device.
DSP Group | Date: 2015-02-04
A device, comprising a first interpolator that is configured to (a) receive, at a first clock rate, a first signal having a first sampling rate and (b) output, at a second clock rate, a second signal having a first desired sampling rate average; wherein the first interpolator comprises: a first buffer for storing the first signal; and a first fractional sampling ratio circuit that is configured to generate a first pattern of fixed point values, wherein an average value of the first pattern corresponds to a first desired sampling rate ratio between the first desired sampling rate average and the first sampling rate.
DSP Group | Date: 2015-01-22
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.