Rožnov pod Radhoštěm, Czech Republic
Rožnov pod Radhoštěm, Czech Republic

Time filter

Source Type

Panko V.,Czech Technical University | Panko V.,Czech Design Center | Banas S.,Czech Technical University | Banas S.,Czech Design Center | And 6 more authors.
Radioengineering | Year: 2015

This paper deals with the enhanced accurate DC and RF model of nonlinear spiral polysilicon voltage divider. The high resistance polysilicon divider is a sensing part of the high voltage start-up MOSFET transistor that can operate up to 700 V. This paper presents the structure of a proposed model, implemented voltage, frequency and temperature dependency, and scalability. A special attention is paid to the ability of the created model to cover the mismatch and influence of a variation of process parameters on the device characteristics. Finally, the comparison of measured data vs. simulation is presented in order to confirm the model validity and a typical application is demonstrated.


Panko V.,Czech Technical University | Panko V.,Czech Design Center | Banas S.,Czech Technical University | Banas S.,Czech Design Center | And 4 more authors.
ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings | Year: 2012

This paper presents an accurate DC and RF modeling of nonlinear spiral high resistance polysilicon divider. The spiral divider is a sensing part of the high voltage start-up MOSFET transistor operating up to 700 V. The strong electric field in low doped drain drift area located under the low doped polysilicon spiral divider results in parasitic effects that have a significant influence on DC and RF device characteristics and makes divider ratio voltage and frequency dependent. This paper demonstrates the structure of a proposed macro model, implemented voltage and frequency dependency, and physical explanation of these phenomena. Finally, the comparison of measured data vs. simulation is presented in order to confirm the model validity. © 2012 IEEE.


Dobes J.,Czech Technical University | Pospisil L.,Czech Technical University | Panko V.,Czech Design Center
Midwest Symposium on Circuits and Systems | Year: 2010

At present, there are many various microwave structures for which their nonlinear models for CAD are necessary. However, in the recent PSpice family programs, only a class of five types of MESFET model is available. In the paper, a method is suggested for modeling miscellaneous RF semiconductor devices by exclusive neural networks or by corrective neural networks working attached to a modified analytic model. An accuracy of the proposed modification of the analytic model is assessed by extracting model parameters of the AlGaAs/InGaAs/GaAs pHEMT. An accuracy of procedures with neural networks is generally assessed by extracting their parameters in static and dynamic domains. An approximation of the AlGaAs/InGaAs/GaAs pHEMT output characteristics is carried out by means of both exclusive and corrective artificial neural networks. A systematic sequence of analyses is also performed for examining an optimal structure of the artificial neural network from the point of view its structure and complexity. The tests have been performed on both five- and four-layer artificial neural networks that serve for modeling a P-channel JFET and for the AlGaAs/InGaAs/GaAs pHEMT. © 2010 IEEE.


Dobes J.,Czech Technical University | Divin J.,Czech Technical University | Divin J.,Czech Design Center | Svaton J.,Czech Technical University | Vejrazka F.,Czech Technical University
Proceedings - IEEE International Symposium on Circuits and Systems | Year: 2014

Although the sensitivity analysis is implemented in contemporary software tools for computer-aided design, kinds of available sensitivities are limited. For example, Spice or Micro-Cap calculate DC or small-signal AC sensitivities, and SpectreRF contains a periodic noise analysis or a parametric sensitivity analysis that can be efficiently used for determining the phase noise. In this paper, some novel types of the noise sensitivity analysis are described, which are not implemented in the usually applied circuit simulators. First, a procedure for determining the sensitivities of the noise figure was suggested. Second, an improvement of the algorithm for computing the noise figure was described, which incorporates circuit matching and eliminates necessary subtraction of the output noise generated by the load resistance at each frequency. Third, a new formula was derived for a computation of the sensitivities of the noise figure. The sensitivity analysis of the noise spectral density is demonstrated by means of an analytically solved example. The application of the sensitivity analysis of the noise figure for improving the noise properties of a microwave integrated circuit is described in a detailed way as well. Finally, using a sophisticated multi-objective optimization is suggested for a better selection of the operating point instead of classical circuit matching. This method was utilized for a practical design of an antenna preamplifier for a GPS/Galileo/GLONASS/Compass receiver. © 2014 IEEE.


Banas S.,Czech Technical University | Banas S.,Czech Design Center | Panko V.,Czech Technical University | Panko V.,Czech Design Center | And 5 more authors.
WIT Transactions on Information and Communication Technologies | Year: 2014

This paper presents the universal behavioral model applicable in Spice simulators for the simulation of high voltage components containing pinch effect and related phenomena, e.g., HV LDMOS, startup FET, dual gate JFET or pinch resistor. Unlike standard compact models [3–5] focused typically to the submicron technologies operating in voltages <<100 V the presented model is in HV applications more accurate and contains all phenomena typical for devices operating in hundred volts, including parasitic effects.This paper demonstrates the main idea of the behavioral model demonstrated in the example of high voltage FET, including the comparison of measured data vs simulation. Due to limited scope of this paper only DC part of the model is presented and only one example of using this model is demonstrated. © 2014 WIT Press.


Dobes J.,Czech Technical University | Panko V.,Czech Technical University | Panko V.,Czech Design Center | Cerny D.,Czech Technical University | And 2 more authors.
IEEE AFRICON Conference | Year: 2013

Although many simulation tools contain advanced algorithms for the solution of the systems of differential-algebraic nonlinear equations, some classes of circuits still cause serious problems. In the paper, a very flexible and reliable algorithm for solving the circuit differential-algebraic equations is characterized first, which is based on a sophisticated arrangement of the Newton interpolation polynomial. After that, a reliable method is introduced for improving the convergence with four possible criteria. Unlike the similar algorithms focused on an operating point analysis only, the proposed method also works in a transient analysis. Moreover, for an ability of the procedure to model practically arbitrary electronic device, a subset of the Fortran 95 programming language was integrated to the circuit simulator with a power to differentiate functions symbolically. © 2013 IEEE.


Banas S.,Czech Design Center | Banas S.,Czech Technical University | Panko V.,Czech Design Center | Panko V.,Czech Technical University | And 4 more authors.
Solid-State Electronics | Year: 2016

Many analog technologies operate in large voltage range and therefore include at least one or more high voltage devices built from low doped layers. Such devices exhibit effects not covered by standard compact models, namely pinching (depletion) effects, in high voltage FETs often called quasisaturation. For example, the conventional compact JFET model is insufficient and oversimplified. Its scalability is controlled by the area factor, which only multiplies currents and capacitances but does not take into account existing 3-D effects. Also the optional second independent gate is missing. Therefore, the customized four terminal (4T) model written in Verilog-A (FitzPatrick and Miller, 2007; Sagdeo, 2007) was developed. It converges very well, its simulation speed is comparable with conventional compact models, and contains all required phenomena, including parasitic effects as, for example, impact ionization. This model has universal usage for many types of devices in various high voltage technologies such as stand-alone voltage dependent resistor, pinch resistor, drift area of power FET, part of special high side or start-up devices, and dual-gate JFET. © 2016 Elsevier Ltd.


Panko V.,Czech Design Center | Panko V.,Czech Technical University | Banas S.,Czech Design Center | Banas S.,Czech Technical University | And 2 more authors.
Solid-State Electronics | Year: 2013

The leakage current in standard MOSFET models (BSIM3/BSIM4) is typically modeled by drain-bulk and source-bulk diodes. This modeling method does not consider the impact of several parasitic bipolar devices. For the accurate modeling the impact of the following bipolar transistors has to be considered: a lateral bipolar transistor drain-bulk-source, a vertical bipolar transistor drain-bulk-substrate (only in isolated structures), and a vertical bipolar transistor source-bulk-substrate (only in isolated structures). For example, the drain or source leakage as a function of gate length cannot be modeled without the scalable parasitic bipolar devices. This contribution demonstrates the structure of a proposed macro model, implemented scalability (in most cases nonlinear), developed scaling equations, and physical explanation of this scaling. Finally, the comparison of measured data vs. simulation is presented in order to confirm the model validity. This model improvement solves not only leakage current scaling, but it also accounts for additional parasitic bipolar effects, such as current injection to the substrate. © 2013 Elsevier Ltd. All rights reserved.


Dobes J.,Czech Technical University | Michal J.,Czech Technical University | Panko V.,Czech Technical University | Panko V.,Czech Design Center | Pospisil L.,Czech Technical University
Solid-State Electronics | Year: 2010

Contemporary models of MOSFET are very complicated, especially the BSIM and EKV ones. Therefore, an identification of many parameters of these models is quite a difficult task from both algorithmic and numeric points of view. Moreover, the complexity of the models makes an optimization of MOS-based functional blocks too difficult. This paper suggests several improvements of both mono-objective and multi-objective optimization methods to enhance the reliability of extraction of the model parameters and to find the most achievable properties of the MOS-based functional blocks. In the mono-objective optimization, we use a faster version of the Levenberg-Marquardt method which does not require a one-dimensional minimization. Moreover, we propose a novel way for normalizing the Jacobian matrix, which makes the algorithm more robust especially in the cases of huge differences of magnitudes of the Jacobian-matrix elements. In the multi-objective optimization, an enhancement of an existing method known as GAM (Goal attainment method) is suggested. In our proposal, the GAM algorithm is combined with a mechanism which automatically provides a set of parameters (weights, coordinates of the reference point) for which the method generates noninferior solutions uniformly spread over a suitably selected part of the Pareto front. The resulting set of solutions is then presented in an appropriate graphic form so that the solution representing the most satisfactory tradeoff can easily be selected by designers. The modified algorithms have been used for characterization of a wide class of MOS-based devices. Utilizing the mono-objective optimization, the model parameters have been determined for both depletion- and enhancement-mode transistors of various types - from submicron to high-power ones. Moreover, we have used the procedures for identifying the parameters of three types of the MOSFET model - the semiempirical, EKV, and BSIM ones, which shows their appropriateness for various transistors. Furthermore, the whole multi-objective optimization algorithm has been implemented as a program and tested on various RF design examples. One of them - a multi-objective optimization of a last stage of a high-power RF amplifier with VMOS for a narrow-band signal with an analog modulation - is also presented. © 2010 Elsevier Ltd. All rights reserved.

Loading Czech Design Center collaborators
Loading Czech Design Center collaborators