Crestec Corporation

Hachiōji, Japan

Crestec Corporation

Hachiōji, Japan
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Owada S.,Sony | Karaki M.,CRESTEC Inc. | Inazu H.,CRESTEC Inc. | Tachikawa R.,CRESTEC Inc. | Goto M.,CRESTEC Inc.
2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016 | Year: 2016

We propose a HEMS Printer that prints smart home-related information on small pieces of paper on demand. Triggered by entrance door motion, demand-response signals, or error signals from home appliances, it prints electricity saving information, upcoming schedules, coupons of nearby stores (to encourage 'cool sharing'), maps of repair shops, and so on. Our device is essentially a portable thermal printer with one LED illuminated button. The LED blinks when some information is ready. Pressing the button prints a slip of paper similar to a receipt. The main advantages of our system is its simplicity, portability and disposability of the paper, and low mental burden. © 2016 IEEE.


Kojima A.,Crestec Corporation | Kojima A.,Tokyo University of Technology | Ohta T.,Tokyo University of Technology | Ohyi H.,Crestec Corporation | Koshida N.,Tokyo University of Technology
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2010

In this paper we report on the development of a Surface Electron Emission Lithography system (SEL) for high resolution and high throughput Electron Beam (EB) lithography. The Parallel EB lithography is performed on a 1:1 prototype electron stepper. A planar type silicon nanowire array ballistic electron emitter (PBE) is employed as a patterned electron emitting mask in this system. The PBE has a metal/silicon nanowire array/semiconductor structure. The nanowire is composed of interconnected silicon nanocrystallites. When a bias voltage is applied to the nanowire, the electrons injected from semiconductor substrate are accelerated via cascade tunneling between silicon nanocrystallites, and emitted from metal surface electrode. The PBE exhibits properties originated from the ballistic transport in nanosilicon layer. The electrons are emitted with uniform intensity in the surface. The emission current is fluctuation-free and low sensitivity against an environmental atomosphere. The PBE projects the pattern on the target wafer in the electron optics of parallel electric and magnetic fields. If all emitted electrons have same initial velocity, they are focused at the same distance. The pattern of the mask on the PBE is reproduced on the target wafer at the distance of the n (n=1, 2,...) cycle of the spiral trajectory of the electron. Practical resolution is limited by the chromatic aberration in this system. We can improve the resolution by reducing the initial energy spread and emission angle dispersion of the emitted electrons because of the characteristics of the ballistic electron emission from PBE. In this study, we confirmed that the submicron patterns is reproduced all over the area of 2.8 mm square. This homogeneity of exposure in the extended area results from the uniformity of nanowire array produced by self-organized chemical reaction process. This technique will be available to produce next generation MEMS with lower cost than that of optical stepper. © 2010 Copyright SPIE - The International Society for Optical Engineering.


Nishino H.,Tohoku University | Yoshida S.,Tohoku University | Kojima A.,Crestec Corporation | Ikegami N.,Tokyo University of Agriculture and Technology | And 3 more authors.
Electronics and Communications in Japan | Year: 2016

SUMMARY This paper reports on the development of a fundamental process for a Pierce-type nanocrystalline Si (nc-Si) electron emitter array for massively parallel electron beam (EB) lithography based on active-matrix operation using a large-scale integrated circuit (LSI). The emitter array consists of 100 × 100 hemispherical emitters formed by isotropic wet etching of Si. EB resist patterning was demonstrated by 1:1 projection exposure using a discrete emitter array at CMOS-compatible operating voltages. Isolation trenches filled with benzocyclobutene (BCB) were fabricated in the Si substrate for independent control of each emitter using the LSI. The integration process of the emitter array with LSI and an extraction electrode plate was also developed based on Au-In and polymer bonding technologies. © 2016 Wiley Periodicals, Inc.


Kojima A.,Crestec Corporation | Kojima A.,Tokyo University of Technology | Ikegami N.,Tokyo University of Technology | Yoshida T.,Tohoku University | And 9 more authors.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2013

This study demonstrated our prototyped Micro Electro Mechanical System (MEMS) electron emitter which is a nc-Si (nanocrystalline silicon) ballistic electron emitter array integrated with an active-matrix driving LSI for high-speed Massively Parallel Electron Beam Direct Writing (MPEBDW) system. The MPEBDW system consists of the multi-column, and each column provides multi-beam. Each column consists of emitter array, a MEMS condenser lens array, an MEMS anode array, a stigmator, three-stage deflectors to align and to scan the multi beams, and a reduction lens as an objective lens. The emitter array generates 100×100 electron beams with binary patterns. The pattern exposed on a target is stored in one of the duplicate memories in the active matrix LSI. After the emission, each electron beam is condensed into narrow beam in parallel to the axis of electron optics of the system with the condenser lens array. The electrons of the beams are accelerated and pass through the anode array. The stigmator and deflectors make fine adjustments to the position of the beams. The reduction lens in the final stage focuses all parallel beams on the surface of the target wafer. The lens reduces the electron image to 1%-10% in size. Electron source in this system is nc-Si ballistic surface electron emitter. The characteristics of the emitter of 1:1 projection of e-beam have been demonstrated in our previous work. We developed a Crestec Surface Electron emission Lithography (CSEL) for mass production of semiconductor devices. CSEL system is 1:1 electron projection lithography using surface electron emitter. In first report, we confirmed that a test bench of CSEL resolved below 30 nm pattern over 0.2 um square area. Practical resolution of the system is limited by the chromatic aberration. We also demonstrated the CSEL system exposed deep sub-micron pattern over full-field for practical use. As an interim report of our development of MPEBDW system, we evaluated characteristics of the emitter array integrated with an active-matrix driving LSI on the CSEL system in this study. The results of its performance as an electron source for massively parallel operation are described. The CSEL as an experimental set consisted of the emitter array and a stage as a collector electrode that is parallel to the surface of the emitters. An accelerating voltage of about -5 kV was applied to the surface of the emitter array with respect to the collector. The target wafer and the emitter array were set between two magnets. The two magnets generated vertical magnetic field of 0.5 T to the surface of the target wafer. A gap between the emitter array and the target wafer was adjusted to a focus length depending on electron trajectories in the electromagnetic field in the system. The emitter array projected 100×100 electron beams with binary patterns and a dots image of its original size on the target wafer. The certain array was examined in order to evaluate the property of the e-beam exposure. © 2013 SPIE.


Kojima A.,Crestec Corporation | Kojima A.,Tokyo University of Technology | Ohta T.,Tokyo University of Technology | Ohyi H.,Crestec Corporation | Koshida N.,Tokyo University of Technology
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2011

We have developed a Crestec Surface Electron emission Lithography (CSEL) for mass production of semiconductor devices. CSEL system is 1:1 electron projection lithography using surface electron emitter. In first report, we confirmed that a test bench of CSEL resolved below 30 nm pattern over 0.2 um square area. Practical resolution of the system is limited by the chromatic aberration. We improved the resolution of the prototype CSEL system by reducing the initial energy spread of electrons and/or by increasing the electric field intensity. An energy spread of emitted electrons of a nanosilicon planar ballistic electron emitter (PBE) is very small. After that, the prototype CSEL system exposed sub-micron patterns distributed over 3 mm square area in last report. In this study, we examine the prototype CSEL system exposed deep sub-micron pattern over full-field for practical use. The experimental column of the system is composed of the PBE and a stage as a collector electrode that is parallel to the electron source. An accelerating voltage of about -5 kV is applied to the electron source with respect to the collector. The target wafer and PBE are set between two magnets. The two magnets generate vertical magnetic field of 0.5 T to the surface of the target wafer. A gap between the electron source and the target wafer is adjusted to a focus length depending on electron trajectories in the electromagnetic field in the system. The electron source projects a patterned electron image on the target since the patterned mask was formed on the surface electrode of the electron source. The electrons are emitted from openings of the mask. When a pulsed bias voltage is applied to the electron source, the electron source emits a patterned surface electron beam. The beam strikes the resist film coated on the target wafer and make replica of the pattern. We indicate the system exposes line patterns of about 200 nm in width over large area. An advantage of CSEL is high resolution due to small chromatic aberration, and another advantage is potentially high throughput because the coulomb blur is small without any crossover in the electron optics. When we get sufficient current from the electron source the throughput can be more than 100 wafers/hour. © 2011 SPIE.


Okino T.,Crestec Corporation | Kuba Y.,Crestec Corporation | Shibata M.,Crestec Corporation | Ohyi H.,Crestec Corporation
Japanese Journal of Applied Physics | Year: 2013

An electron beam lithography (EBL) system, CABL-UH, with a 130 kV high acceleration voltage has been developed that succeeded in minimizing beam size by minimizing Coulomb blur. This system has a short single-stage electron beam (EB) gun with an alignment function of two extractor centers to minimize Coulomb blur. This gun has also succeeded in thoroughly avoiding microdischarges. By adopting this EB gun and many other techniques, high resolution and long-term high stability have been achieved and an extremely fine pattern (4 nm line) has been delineated. © 2013 The Japan Society of Applied Physics.


Ikegami N.,Tokyo University of Technology | Yoshida T.,Tohoku University | Kojima A.,Crestec Corporation | Ohyi H.,Crestec Corporation | And 2 more authors.
Proceedings of SPIE - The International Society for Optical Engineering | Year: 2012

This paper presents our designed and prototyped structure of electron emitter array integrated with an active-matrix driving LSI for high-speed massively parallel direct-write electron-beam (e-beam) system. In addition, the validation results of its performance as an electron source for massively parallel operation are described. Electron source used in this system is nanocrystalline Si (nc-Si) ballistic surface electron emitter where 1:1 projection of e-beam has been demonstrated to resolve patterns of 30 nm in width in our previous work. Electron emitting part of the device consists of arrayed dots of nc-Si emitter fabricated on SOI or Si substrate, and TSV (Through Silicon Via) plugs connected to the dots from back side of the substrate. Forming an aligned joint of the TSV plugs with driving pads on the active-matrix LSI constitutes the device. Electron emission is driven by the LSI operation, boosted up to appropriate level by the builtin voltage level shifter, in accordance with a bitmap image preliminarily stored in an embedded memory. Electron emission from a test structure of arrayed dot patterns of nc-Si emitter worked in practice, showing the possibility to switch on and off the beamlets by changing CMOS-compatible voltage. © 2012 Copyright SPIE.


Ikegami N.,Tokyo University of Agriculture and Technology | Koshida N.,Tokyo University of Agriculture and Technology | Kojima A.,Crestec Corporation | Ohyi H.,Crestec Corporation | And 2 more authors.
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures | Year: 2013

A planar nanocrystalline silicon (nc-Si) electron emitter array compatible with an active-matrix large-scale integrated (LSI) driving circuit has been developed for massively parallel electron beam direct-write lithography. The electron-emitting part of the device consists of a 50-μm-pitch and 200 × 200 arrays of nc-Si dots fabricated on a Si substrate, and via-first-processed through-silicon-via (TSV) plugs of poly-Si connected with the dots from behind the substrate. Tapered emitter-array etching and electrochemical-oxidation with subsequent annealing and super-critical rinsing and drying processes significantly enhanced the electron emission current by improving and stabilizing uniformity and reducing the process temperature. When the emitter array was driven, electrons were effectively injected into the nc-Si layer through the TSV plugs and quasiballistically emitted through the gold surface electrode. The nc-Si emitter responded to the input signal within times of 0.1 μs or less. A 1:1 pattern transfer experiment demonstrated that 5 × 5 subset square patterns selected from the emitter array can be reproduced on an e-beam resist without any distortions or fluctuations, showing that the energy dispersion of the emitted electrons is quite small. The basic concept of electronic aberration correction performed by an active-matrix LSI driving circuit is also discussed. © 2013 American Vacuum Society.


Nishino H.,Tohoku University | Yoshida S.,Tohoku University | Kojima A.,CRESTEC CORPORATION | Ikegami N.,Tokyo University of Agriculture and Technology | And 3 more authors.
Proceedings of the IEEE International Conference on Micro Electro Mechanical Systems (MEMS) | Year: 2014

This paper mainly reports the process development of a Pierce-type nanocrystalline Si (nc-Si) electron emitter array for massively parallel electron beam (EB) lithography based on active-matrix operation using a large-scaled integrated circuit (LSI). The emitter array consists of 100×100 hemispherical emitters formed by isotropic wet etching of Si. EB resist patterning was demonstrated by 1:1 projection exposure using a discrete emitter array at CMOS-compatible operation voltages. To independently control each emitter using the LSI, isolation trenches filled with benzocyclobutene (BCB) were fabricated in the Si substrate. In addition, the integration process of the emitter array, the LSI and an extraction electrode plate was developed based on Au-In and polymer bonding technologies. © 2014 IEEE.


Patent
Crestec Corporation | Date: 2010-01-06

A surface emission type electron source according to the present invention includes a first electrode having a planar form; a second electrode having a planar form facing the first electrode; an electron passage layer disposed between the first electrode and the second electrode; and a power source part configured to apply a voltage to the second electrode and the first electrode. The electron passage layer includes plural quantum wires extending in a first direction from the first electrode to the second electrode. The quantum wires are spaced apart from each other at predetermined intervals, and electrons are emitted from a front surface of the second electrode. The quantum wires are made of silicon, and each of the quantum wires has plural thin parts having small thicknesses formed at predetermined intervals along the first direction.

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