Entity

Time filter

Source Type

Sunnyvale, CA, United States

Karunamurthy B.,KAI | Ostermann T.,Infineon Technologies | Bhattacharya M.,Coventor Inc | Maity S.,Coventor Inc
Microelectronics Journal | Year: 2014

A methodology for simulating the accurate 3D structural details of a non-planarized technology chips is presented. FEM is a powerful tool used for electrical, thermal and mechanical analysis in the microelectronics industry. Manual geometry and finite element mesh generation of a 3D non-planar chip topology is extremely tedious and time consuming. Therefore, a new method, which is automatic or semi-automatic, is required to drastically reduce the pre-processing effort required for finite element simulations. Our proposed approach uses a virtual semiconductor fabrication technique to create geometry and finite element mesh on complex chip topology features. A microscopic power metal stack of a power IC was simulated to demonstrate this new simulation methodology and the results are presented. These numerical simulations, which included the non-linear behavior in the matrix, show that the detailed information of the large stress and strain gradients in the micro-fields can be obtained. © 2014 Elsevier Ltd.


Schropfer G.,Coventor SARL | Lorenz G.,Coventor SARL | Rouvillois S.,Coventor SARL | Breit S.,Coventor Inc
Journal of Micromechanics and Microengineering | Year: 2010

This paper provides a brief summary of the state-of-the-art of MEMS-specific modeling techniques and describes the validation of new models for a parametric component library. Two recently developed 3D modeling tools are described in more detail. The first one captures a methodology for designing MEMS devices and simulating them together with integrated electronics within a standard electronic design automation (EDA) environment. The MEMS designer can construct the MEMS model directly in a 3D view. The resulting 3D model differs from a typical feature-based 3D CAD modeling tool in that there is an underlying behavioral model and parametric layout associated with each MEMS component. The model of the complete MEMS device that is shared with the standard EDA environment can be fully parameterized with respect to manufacturing- and design-dependent variables. Another recent innovation is a process modeling tool that allows accurate and highly realistic visualization of the step-by-step creation of 3D micro-fabricated devices. The novelty of the tool lies in its use of voxels (3D pixels) rather than conventional 3D CAD techniques to represent the 3D geometry. Case studies for experimental devices are presented showing how the examination of these virtual prototypes can reveal design errors before mask tape out, support process development before actual fabrication and also enable failure analysis after manufacturing. © 2010 IOP Publishing Ltd.


Zhang Z.,Massachusetts Institute of Technology | Kamon M.,Coventor Inc | Daniel L.,Massachusetts Institute of Technology
Journal of Microelectromechanical Systems | Year: 2014

The voltages at which microelectromechanical actuators and sensors become unstable, known as pull-in and lift-off voltages, are critical parameters in microelectromechanical systems (MEMS) design. The state-of-the-art MEMS simulators compute these parameters by simply sweeping the voltage, leading to either excessively large computational cost or to convergence failure near the pull-in or lift-off points. This paper proposes to simulate the behavior at pull-in and lift-off employing two continuation-based algorithms. The first algorithm appropriately adapts standard continuation methods, providing a complete set of static solutions. The second algorithm uses continuation to trace two kinds of curves and generates the sweep-up or sweep-down curves, which can provide more intuition for MEMS designers. The algorithms presented in this paper are robust and suitable for general-purpose industrial MEMS designs. Our algorithms have been implemented in a commercial MEMS/integrated circuits codesign tool, and their effectiveness is validated by comparisons against measurement data and the commercial finite-element/boundary-element (FEM/BEM) solver CoventorWare. © 2014 IEEE.


A mechanism for identifying and modeling pattern dependent effects of processes in a 3-D Virtual Semiconductor Fabrication Environment is discussed.


Patent
Coventor Inc. | Date: 2013-03-14

A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.

Discover hidden collaborations