Entity

Time filter

Source Type

Niigata-shi, Japan

Yamashita M.,Osaka University | Nakamura Y.,Osaka University | Nakamura Y.,Japan Science and Technology Agency | Sugimoto R.,Osaka University | And 3 more authors.
Applied Surface Science | Year: 2013

We investigated the formation mechanism of peculiar structures on vicinal Si(1 1 0) surfaces caused by annealing. The shapes of the peculiar structures strongly depended on the tilt angle of the vicinal surface from the exact Si(1 1 0) surface. The size of these structures varied with temperature and pressure during annealing. The dependence of the peculiar structure size on the annealing conditions can be explained by considering nucleation of the peculiar structures that is strongly related to Si surface diffusion during the annealing. © 2012 Elsevier B.V. All rights reserved. Source


Vincent B.,IMEC | Shimura Y.,Nagoya University | Shimura Y.,Japan Society for the Promotion of Science | Takeuchi S.,Nagoya University | And 14 more authors.
Microelectronic Engineering | Year: 2011

In order to outperform current uniaxial compressively strained Silicon channel pMOSFET technology (with embedded SiGe source/drain), switching to strained Ge channel is mandatory. GeSn materials, having larger lattice parameter than Ge, are proposed in this article as embedded source/drain stressors for Ge channels. Our simulation results indicate that a minimum of 5% Sn is required in the GeSn source/drain to build a competitive strained Ge pMOSFETs with respect to strained Si channels. Therefore the compatibility of GeSn (with 2-8% Sn) materials with source/drain engineering processes (B implantation and activation and NiGeSn formation) has been studied. A low thermal budget has been determined for those processes on GeSn alloys: temperatures must be lower than 600 °C for B activation and lower than 450 °C for NiGeSn formation. © 2010 Elsevier B.V. All rights reserved. Source


Takeuchi S.,Nagoya University | Takeuchi S.,Covalent Silicon Co. | Shimura Y.,Nagoya University | Nishimura T.,Nagoya University | And 12 more authors.
ECS Transactions | Year: 2010

In this paper, we propose the fabrication of strained Ge complementary metal-oxide-semiconductor (CMOS) with Ge1-xSnx materials as embedded stressors to outperform the state-of-the-art strained Si CMOS. Ge1-xSnx materials have larger lattice constant than that of Ge, which can apply the strain into Ge channel region. Compatibility of Ge1-xSnx (with 2-8% Sn) materials with source/drain engineering processes (B implantation and activation, in situ Ga doping, and Ni(Ge1-ySny) formation) is characterized. A low thermal budget has been determined for those processes on Ge1-xSnx alloys: temperatures must be lower than 600°C for B activation and lower than 450°C for Ni(Ge1-ySny) formation. ©The Electrochemical Society. Source


Shimura Y.,Nagoya University | Takeuchi S.,Nagoya University | Takeuchi S.,Covalent Silicon Co. | Nakatsuka O.,Nagoya University | Zaima S.,Nagoya University
ECS Transactions | Year: 2010

We have investigated the dependence of strain relaxation behavior of Ge1-xSnx layers on the misfit strain at the interface between Ge1-x Snx layers and substrates. When the large misfit strain was induced, surface roughening and degradation of the crystallinity occurred during the Ge1-xSnx growth. We found that the universal dependency of the strain relaxation behavior, which is independent on kinds of substrates. As a result, the Ge1-xSn x layer having a Sn content of 12.3% was achieved, which has a potential to induce a tensile strain of 1.28% in a Ge layer. ©The Electrochemical Society. Source


Minami K.,Osaka University | Nakamura Y.,Osaka University | Nakamura Y.,Japan Science and Technology Agency | Yamasaka S.,Osaka University | And 4 more authors.
Thin Solid Films | Year: 2012

The electrical properties of wafer-bonded n-type Ge(111)-on-insulator (Ge(111)-OI) substrates were characterized using a four-point-probe pseudo-metal-oxide-semiconductor field-effect transistor (pseudo-MOSFET) method. Average electron and hole mobilities in the Ge(111)-OI channel were measured to be ∼1000 cm 2/V s in accumulation mode and ∼310 cm 2/V s in inversion mode, respectively. The measured mobility strongly depended on the sample position, due to the spatially inhomogeneous distribution of the interface states. Despite the existence of interface states, the carrier mobility exhibited a high value demonstrating the prospect of wafer-bonded Ge(111)-OI as a channel material in MOSFETs. © 2011 Elsevier B.V. All rights reserved. Source

Discover hidden collaborations