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Hsinchu, Taiwan

Haroun I.,Communications Research Center Canada | Haroun I.,Carleton University | Wight J.,Carleton University | Plett C.,Carleton University | And 2 more authors.
IEEE Microwave and Wireless Components Letters | Year: 2010

A 60 GHz reduced-size branch-line coupler has been developed using elevated-center coplanar waveguide (EC-CPW) transmission lines. The coupler is fabricated in a 90 nm CMOS technology and has a chip area of 0.102 mm 2. The measurements indicated an amplitude-imbalance of 0.7 dB and a phase difference of 88 degrees at 60 GHz, a return loss of greater than 15 dB at every port over the 60 GHz band (57-64 GHz), and an isolation better than 17 dB. A 73% size-reduction compared to a conventional CPW coupler design has been achieved using capacitively loaded high-impedance EC-CPW lines. The proposed coupler is well suited for the design of millimeter-wave (mmW) CMOS subsystems including: balanced amplifiers, vector modulators, and balanced mixers. © 2010 IEEE. Source

Wey C.-L.,National Chiao Tung University | Jui P.-C.,National Central University | Sung G.-N.,Chip Implementation Center
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | Year: 2014

This study presents efficient algorithms for performing multiply-by-3 (3N) and divide-by-3 (N/3) operations with the additions and subtractions, respectively. No multiplications and divisions are needed. Full adder (FA) and full subtractor (FS) can be implemented to realize the N3 and N/3 operations, respectively. For fast hardware implementation, this paper introduces two basic cells UCA and UCS for 3N and N/3 operations, respectively. For 3N operation, the UCA-based ripple carry adder (RCA) and carry lookahead adder (CLA) designs are proposed and their speed performances are estimated based on the delay data of standard cell library in TSMC 0.18 ?m CMOS process. Results show that the 16-bit UCA-based RCA is about 3 times faster than the conventional FA-based RCA and even 25% faster than the FA-based CLA. The proposed 16-bit and 64-bit UCA-based CLAs are 62% and 36% faster than the conventional FA-based CLAs, respectively. For N/3 operations, ripple borrow subtractor (RBS) is also presented. The 16-bit UCS-based RBS is about 15.5% faster than the 16-bit FS-based RBS. Copyright © 2014 The Institute of Electronics, Information and Communication Engineers. Source

Lin T.-Y.,National Central University | Chiu T.,National Central University | Chang D.-C.,Chip Implementation Center
IEEE Transactions on Components, Packaging and Manufacturing Technology | Year: 2014

A dual-band antenna-in-package for millimeter-wave (mmW) applications is presented in the paper. The proposed antenna, which consists of a radiating slot and an air-filled cavity, is fed by a microstrip loaded with two tuning open-circuited stubs through a coupling C-shape aperture to achieve dual-band characteristics. The air-filled cavity, which is formed by the space between CMOS chip and integrated passive device substrate after flip-chip assembly process, can reduce loss and improve antenna gain. Simulation and measurement regarding antenna reflection coefficient, radiation pattern, and peak gain are conducted for design validation. The measured results show that the antenna can operate in V-band and E-band, and the impedance bandwidths with the reflection coefficient less than -10 dB are 6.1% and 5.8%, respectively. The measured gains are -2 dBi at 58 GHz and 0.3 dBi at 77 GHz, respectively. The proposed antenna is well suited for dual-band mmW high-data-rate wireless communication systems. © 2011-2012 IEEE. Source

Kuo H.-C.,National Cheng Kung University | Yue H.-L.,National Cheng Kung University | Ou Y.-W.,National Cheng Kung University | Ou Y.-W.,Chip Implementation Center | And 2 more authors.
IEEE Transactions on Microwave Theory and Techniques | Year: 2013

This paper presents a first reported 60-GHz CMOS sub-harmonic RF receiver with an integrated on-chip artificial-magnetic-conductor (AMC) Yagi antenna and a balun bandpass filter (BPF) fabricated in 90-nm technology. The on-chip antenna with an AMC structure can reduce the substrate loss and increase the antenna radiation efficiency and power gain. The on-chip balun BPF combines the integrated design of the balun and RF BPF to reduce the circuit size and the insertion loss. The sub-harmonic receiver is adopted to mitigate the dc offset problem. The probe-station based on-wafer continuous wave wireless transmission test is conducted (R=1 m) and the measured total receiving conversion gain CGant+Rx and output third-order intercept point of the integrated RF receiver (with the on-chip AMC antenna and the balun BPF) are 16.2 dB and 3 dBm at 60 GHz, respectively. In error vector magnitude/bit error rate (BER) tests, the measured maximum data rate is 1.152 Gb/s in the 16QAM mode at a 25-cm wireless link (transmitting EIRP}=23 dBm) approximately with a BER of 10 -3. The presented integrated RF receiver will be very useful for the design of a 60-GHz fully integrated CMOS single-chip radio for very-short-range communication applications. © 1963-2012 IEEE. Source

Haroun I.,Communications Research Center Canada | Haroun I.,Carleton University | Plett C.,Carleton University | Hsu Y.-C.,Chip Implementation Center | Chang D.-C.,Chip Implementation Center
IEEE Transactions on Components, Packaging and Manufacturing Technology | Year: 2012

A compact 60-GHz band branch-line coupler using cpacitively loaded lower-ground coplanar-waveguide (LG-CPW) lines has been successfully demonstrated in a glass-substrate integrated passive device technology. The fabricated coupler has a size reduction of more than 83% compared to that of a conventional CPW branch-line coupler. The capacitive loading is achieved by utilizing the signal layer and the LG of the LG-CPW structure to form microstrip open-circuited stubs. The measured results show a phase error of less than 0.5° between the coupler's output ports and an amplitude imbalance of less than 1.2 dB over the frequency band 57-64 GHz. The measurements also show that both the return loss and isolation are better than 25 dB at 60 GHz and better than 15 dB over the 57-64-GHz band. The proposed coupler is well suited for low-cost high-performance system-on-package V-band radio front ends for high data rate applications. © 2012 IEEE. Source

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