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Fan X.,University of Electronic Science and Technology of China | Fan X.,Chengdu Sino Microelectronics Technology Co. | Li P.,University of Electronic Science and Technology of China | Li P.,Chengdu Sino Microelectronics Technology Co. | And 4 more authors.
Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics | Year: 2011

This paper reports the Co-60 radiation test results of 4-megabit 0.18 μm Flash memory under biased and unbiased conditions. The Flash memory is designed for configuration of FPGAs. The change of the supply current and the functional failure states in respect to the total ionizing dose (TID) are obtained respectively. The supply current is observed increase at a total dose threshold of 45 krad (Si), and functional failures occurred at a total dose threshold of 92 krad (Si).


Cai H.,University of Electronic Science and Technology of China | Li P.,University of Electronic Science and Technology of China | Cen Y.,Chengdu Sino Microelectronics Technology Co. | Zhu Z.,Chengdu Sino Microelectronics Technology Co.
Journal of Semiconductors | Year: 2012

This paper presents a design of 14-bit 80 Msample/s pipelined ADC implemented in 0.35 μm CMOS. A charge-sharing correction is proposed to remove the signal-dependent charge-injection, together with a low-jitter clock circuit, guaranteeing the high dynamic performance for the ADC. A scheme of capacitor-switching and a symmetrical layout technique minimizes capacitor mismatch, ensuring the overall linearity. The measured results show that the calibration-free ADC achieves an effective number of bits of 11.6-bit, spurious free dynamic range (SFDR) of 84.8 dB, signal-to-noise-and-distortion ratio (SNDR) of 72 dB, differential nonlinearity of +0.63/-0.6 LSB and integrated nonlinearity of +1.3/-0.9 LSB at 36.7 MHz input and maintains over 75 dB SFDR and 59 dB SNDR up to 200 MHz. © 2012 Chinese Institute of Electronics.


Fan X.,University of Electronic Science and Technology of China | Fan X.,Chengdu Sino Microelectronics Technology Co. | Li P.,University of Electronic Science and Technology of China | Li P.,Chengdu Sino Microelectronics Technology Co. | And 6 more authors.
Qiangjiguang Yu Lizishu/High Power Laser and Particle Beams | Year: 2011

Single event effects(SEEs) test results on a static random access memory(SRAM)-based FPGA with 100 k system gates using californium-252 (252Cf) and the HI-13 tandem-accelerator are presented. The results including the static single event upset(SEU) cross-sections and the linear energy transfer(LET) threshold of single event latchup(SEL) were quantitatively compared and analyzed. The results showed that the SEU cross-sections using 252Cf were an order of magnitude less than the ones using the accelerator. SEL was not observed when the FPGA was exposed to the 252Cf, while SEL LET threshold could be measured when using the heavy-ion accelerator. Therefore, 252Cf is not an ideal radioactive source to test SEL of CMOS circuits fabricated with advanced technologies for experimental simulation of the space environment.


Chen X.,China Electronics Product Reliability and Environmental Testing Institute | Li Q.,Chengdu Sino Microelectronics Technology Co. | Liu L.,China Electronics Product Reliability and Environmental Testing Institute | Liu B.,Chengdu Sino Microelectronics Technology Co.
Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA | Year: 2015

ESD sensitive test was performed to verify the design of circuit protection unit. The failure ICs were analyzed by OBIRCH technique. Three anomalous thermally sensitive sites were localized including I/O and VCCIOs. OBIRCH analysis confirmed the failure sites were directly connect to the pads, mostly ESD protection units, decoupling capacitor and internal inverter. Physical failure analysis confirmed the OBIRCH findings, and revealed that improper triggering of ggNMOS structure and gate oxide breakdown were the root causes, the effectiveness and robustness of the structure need improvement. The suspect was also verified against failure data measured using TLP testing. All these experimental investigations were carried out in order to develop optimized protection structures against ESD. © 2015 IEEE.

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