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Zakaria Z.,Center for Telecommunication Research and Innovation | Sam W.Y.,Center for Telecommunication Research and Innovation | Abd Aziz M.Z.,Center for Telecommunication Research and Innovation | Muzafar Ismail M.,Center for Telecommunication Research and Innovation
Procedia Engineering | Year: 2013

This paper presents the technique for integrating the rectangular Substrate Integrated Waveguide (SIW) filter with the rectangular microstrip patch antenna to produce filtering and radiating element in a single device. To proof the concept, the integrated microwave filter and antenna at center frequency of 2 GHz was demonstrated and validated through simulation and measurement. It demonstrated promising measured results, which were ingood agreement with the simulated results. The integrated microwave filter and antenna would be beneficial in microwave systems where the reduction of overall volume and weight as well as cost is very important such as in base stations and multiplexer in any communication systems. © 2013 The Authors.


Ismail M.K.,Center for Telecommunication Research and Innovation | Md Isa A.A.,Center for Telecommunication Research and Innovation | Husain M.N.,Center for Telecommunication Research and Innovation | Johal M.S.,Center for Telecommunication Research and Innovation | And 3 more authors.
ARPN Journal of Engineering and Applied Sciences | Year: 2016

Long Term Evolution (LTE) is well known as a cellular network that can support very high data rates in diverse traffic conditions. One way of achieving it is through packet scheduling which is the key scheme of Radio Resource Management (RRM) for LTE traffic processing that is functioning to allocate resources for both frequency and time dimensions. The main contribution of this paper is the design of a new scheduling scheme and its performance is compared with the Proportional Fair (PF) and Round Robin (RR) downlink schedulers for LTE by utilizing LTE Downlink System Level Simulator. The proposed new scheduling algorithm, namely the Modified-PF scheduler divides a single subframe into multiple time slots and allocates the resource block (RB) to the targeted User Equipment (UE) in all time slots for each subframe based on the instantaneous Channel Quality Indicator (CQI) feedback received from UEs. Simulation results show that the Modified-PF scheduler provides the best performance in terms of throughput and spectral efficiency with comparale fairness as compared to RR and PF schedulers. Although PF scheduler has the best fairness index, the Modified-PF scheduler provides a better compromise between the throughput/spectral efficiency and fairness. This shows that the newly proposed scheme improves the LTE output performances while at the same time maintains minimal required fairness among the UEs. © 2006-2016 Asian Research Publishing Network (ARPN).


Mustafa N.H.,Center for Telecommunication Research and Innovation | Husain M.N.,Center for Telecommunication Research and Innovation | Abd Aziz M.Z.A.,Center for Telecommunication Research and Innovation | Othman M.A.,Center for Telecommunication Research and Innovation | Malek F.,University Malaysia PerlisPerlis
Advanced Science Letters | Year: 2014

Nowadays, smart house technology can offers a better quality of life by introducing automated appliance control and assistive services. However, human behaviors always related to day routine activities in smart house which will contribute to the efficiency of the system. This paper will focus on the energy monitoring based on duration time in office hours around 8 am until 5 pm which depend on human behavior at working place. The inhabitant activities are actually a sequence of sequential events. The worker in order uses appliances according to personal choice, environment, and situation demand. Then, the correlation coefficient method is used to show the relation between energy consumption and energy saving based on the total hours of time energy spent. In future, the percentages of energy monitoring system usage will be increase to manage energy in efficient ways based on human behaviours. This scenario will lead to the positive impact in order to achieve the energy saving in the building and support world green environment. © 2014 American Scientific Publishers All rights reserved.


Malek F.,University Malaysia Perlis | Zainuddin N.A.,Center for Telecommunication Research and Innovation | Abd Aziz M.Z.A.,Center for Telecommunication Research and Innovation | Nornikman H.,Center for Telecommunication Research and Innovation | And 3 more authors.
IEEE Symposium on Wireless Technology and Applications, ISWTA | Year: 2013

In this paper, a printed two C-shaped monopole antenna array for dual-band WLAN application is presented. The proposed antenna array contains two C-shaped monopole with a shorting line for connecting the two arms of the antenna elements. The purpose of the shorting line is to neutralize the current between the two arms which in return can increase the isolation. A parametric study was also carried out to investigate various parameters that effect the antenna design. The proposed antenna has been designed and simulated by using CST Microwave Studio simulation software. The return loss and gain result of the fabricated antenna is 25.40 dB and 2.91 dB at 2.40 GHz and 16.20 dB and 2.82 dB at 5.20 GHz. © 2013 IEEE.


Zain A.S.M.,Center for Telecommunication Research and Innovation | Zain N.F.M.,Hang Tuah University | Salehuddin F.,Center for Telecommunication Research and Innovation | Jamaluddin N.,Hang Tuah University | Abdullah Yaacob N.,Hang Tuah University
ARPN Journal of Engineering and Applied Sciences | Year: 2016

SOI MOSFET has currently become a trend for low power devices such as palmtops, cell phone, and other devices because it has a lot of advantage in terms of speed, density, and performance gain. Various efforts have been done to continue the progress in shrinking dimensions and higher-frequency performance will be driven by the market application. Reducing the size of SOI MOSFET will reduce the power, body effect, and parasitic capacitance, and increase the density and so on. This project focused mainly on the source/drain doping abruptness of SOI MOSFET. The doping abruptness was varied to find the best doping profile since the device was shrinking. In order to vary the source/drain doping abruptness, there were several problems to be encountered, which were increase in resistance, increase in threshold voltage, small sub-threshold slope, and others. The purpose of this project was to design the SOI MOSFET with an ideal doping profile and to investigate the impact on threshold voltage, current, and sub-threshold slope due to the variation of source/drain doping abruptness of SOI MOSFET. This project was designed using Silvaco Athena and Silvaco Atlas. Silvaco Athena was used to simulate the device structure and Silvaco Atlas was used to obtain the device characteristics of SOI MOSFET. This whole project was implemented on an SOI MOSFET doping abruptness dependent with a gate length of 21 nm. © 2006-2016 Asian Research Publishing Network (ARPN).

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