CAS Institute of Computing Technology | Date: 2015-03-12
The present invention discloses a method for integrating a many-core processor system with a network router. The method comprises a subnet division step used for dividing an on-chip network into network requests in multiple subnet balance chips, and a network interface device deployment step used for deploying at least one network interface device in a subnet in a distributed mode in order to guarantee optimization of the connectivity between the deployed network interface device and the processor cores in the subnets and to implement rapid data exchange of the on-chip network or the inter-chip network. The present invention also discloses a many-core processor system integrated with a network router. The system comprises a network router used for network interfacing and data exchange, and comprising multiple network interface devices embedded into the on-chip network in a distributed mode.
He W.,Old Dominion University |
Xu L.D.,Old Dominion University |
Xu L.D.,CAS Institute of Computing Technology
IEEE Transactions on Industrial Informatics | Year: 2014
Many industrial enterprises acquire disparate systems and applications over the years. The need to integrate these different systems and applications is often prominent for satisfying business requirements and needs. In an effort to help researchers in industrial informatics understand the state-of-the-art of the enterprise application integration, we examined the architectures and technologies for integrating distributed enterprise applications, illustrated their strengths and weaknesses, and identified research trends and opportunities in this increasingly important area. © 2005-2012 IEEE.
Agency: European Commission | Branch: FP7 | Program: NOE | Phase: ICT-2011.1.6 | Award Amount: 5.99M | Year: 2011
The goal of EINS is coordinating and integrating European research aimed at achieving a deeper multidisciplinary understanding of the development of the Internet as a societal and technological artefact, whose evolution is increasingly interwined with that of human societies. Its main objective is to allow an open and productive dialogue between all the disciplines which study Internet systems under any technological or humanistic perspective, and which in turn are being transformed by the continuous advances in Internet functionalities and applications. EINS will bring together research institutions focusing on network engineering, computation, complexity, security, trust, mathematics, physics, sociology, game theory, economics, political sciences, humanities, law, energy, transport, artistic expression, and any other relevant social and life sciences.\nThis multidisciplinary bridging of the different disciplines may also be seen as the starting point for a new Internet Science, the theoretical and empirical foundation for an holistic understanding of the complex techno-social interactions related to the Internet. It is supposed to inform the future technological, social, political choices concerning Internet technologies, infrastructures and policies made by the various public and private stakeholders, for example as for the far-ended possible consequences of architectural choices on social, economic, environmental or political aspects, and ultimately on quality of life at large.\nThe individual contributing disciplines will themselves benefit from a more holistic understanding of the Internet principles and in particular of the network effect. The unprecedented connectivity offered by the Internet plays a role often underappreciated in most of them; whereas the Internet provides both an operational development platform and a concrete empirical and experimental model. These multi- and inter-disciplinary investigations will improve the design of elements of Future Internet, enhance the understanding of its evolving and emerging implications at societal level, and possibly identify universal principles for understanding the Internet-based world that will be fed back to the participating disciplines. EINS will:\nCoordinate the investigation, from a multi-disciplinary perspective, of specific topics at the intersection between humanistic and technological sciences, such as privacy & identity, reputation, virtual communities, security & resilience, network neutrality\nLay the foundations for an Internet Science, based i.a. on Network Science and Web Science, aiming at understanding the impact of the network effect on human societies & organisations, as for technological, economic, social & environmental aspects\nProvide concrete incentives for academic institutions and individual researchers to conduct studies across multiple disciplines, in the form of online journals, conferences, workshops, PhD courses, schools, contests, and open calls
Agency: European Commission | Branch: H2020 | Program: CSA | Phase: ICT-37-2016 | Award Amount: 2.56M | Year: 2017
Europe and China are at the forefront of technological advances in areas related to the Future Internet (especially 5G and IoT). While both parties share common technological objectives, there is still room for improvement in what concerns bilateral co-operation. As a result, the main purpose of EXCITING is to support the creation of favourable conditions for co-operation between the European and Chinese research and innovation ecosystems, mainly related to the key strategic domains of IoT and 5G. EXCITING will study the research and innovation ecosystem for IoT and 5G in China and compare it with the European model. EXCITING will identify and document the key international standards bodies for IoT and 5G, as well as other associations and fora where discussions take place and implementation decisions are made. Going beyond standardisation, interoperability testing is a key step towards market deployment. EXCITING will identify and document the key international InterOp events at which European and Chinese manufacturers can test and certify their IoT and 5G products. It will also explain the rules for engaging in these events. EXCITING will produce Best Practice guidelines for establishing and operating practical joint collaborations, in order to stimulate further such co-operations in the future on IoT and 5G Large Scale Pilots. As a result of the above investigations EXCITING will produce a roadmap showing how research and innovation ecosystems, policy, standardisation, interoperability testing and practical Large Scale Pilots should be addressed during the H2020 timeframe, and make recommendations for optimising collaboration between Europe and China for IoT and 5G.
Xu L.D.,CAS Institute of Computing Technology |
Viriyasitavat W.,Chulalongkorn University
IEEE Transactions on Industrial Informatics | Year: 2014
The internet-of-things (IoT) technology allows auto-organized and intelligent entities such as services to be interoperable and able to act independently. This enables the advanced form of service composition by allowing individual services to dynamically form a service workflow. In this context, services possess different requirements where the compliance of such requirements reflects trust-based decision for participating in a workflow. Large-scale service interoperations pose significant challenges for compliance checking of those requirements. These include inconsistency of requirements that can be represented in different formats and dynamicity, where a workflow can be modified based on service creation, modification, or termination. These factors directly affect the decision of a service to be part of a workflow. To solve these problems, service workflow specification (SWSpec) has been proposed as a consistent and uniformed representation of requirements, and algorithms based on constrained truth table (CTT) have been developed for automatic compliance checking. In this paper, the architecture of these elements is created to facilitate 1) a workflow owner in specifying properties of services to be part of a workflow and 2) services to express their requirements where their compliance reflects trust-based participation decision. © 2012 IEEE.
Tian R.,CAS Institute of Computing Technology
Computer Methods in Applied Mechanics and Engineering | Year: 2013
A GFEM without extra dof is developed. Without the extra dof, the resulting linear system becomes independent-in size-of the order of local approximation, the resulting PU approximation becomes free of linear dependence, and the resulting stiffness matrix becomes good conditioned. Numerical studies show the new GFEM's excellent convergence properties and excellent stability. © 2013 Elsevier B.V.
Zhuge H.,CAS Institute of Computing Technology
Artificial Intelligence | Year: 2011
Humans consciously and subconsciously establish various links, emerge semantic images and reason in mind, learn linking effect and rules, select linked individuals to interact, and form closed loops through links while co-experiencing in multiple spaces in lifetime. Machines are limited in these abilities although various graph-based models have been used to link resources in the cyber space. The following are fundamental limitations of machine intelligence: (1) machines know few links and rules in the physical space, physiological space, psychological space, socio space and mental space, so it is not realistic to expect machines to discover laws and solve problems in these spaces; and, (2) machines can only process pre-designed algorithms and data structures in the cyber space. They are limited in ability to go beyond the cyber space, to learn linking rules, to know the effect of linking, and to explain computing results according to physical, physiological, psychological and socio laws. Linking various spaces will create a complex space - the Cyber-Physical-Physiological-Psychological-Socio-Mental Environment CP 3SME. Diverse spaces will emerge, evolve, compete and cooperate with each other to extend machine intelligence and human intelligence. From multi-disciplinary perspective, this paper reviews previous ideas on various links, introduces the concept of cyber-physical society, proposes the ideal of the CP3SME including its definition, characteristics, and multi-disciplinary revolution, and explores the methodology of linking through spaces for cyber-physical-socio intelligence. The methodology includes new models, principles, mechanisms, scientific issues, and philosophical explanation. The CP3SME aims at an ideal environment for humans to live and work. Exploration will go beyond previous ideals on intelligence and computing. © 2011 Elsevier B.V. All rights reserved.
CAS Institute of Computing Technology | Date: 2010-09-08
The present invention discloses a RISC processor and a method of processing flag bits of a register in the RISC processor. Said RISC processor comprises a physical register stack, an operating component connected to the physical register stack and an decoder connected to the operating component; the physical register stack comprises an emulation flag register for emulating to realize flag bits of a flag register in a CISC processor; the operating component comprises a flag read-write module for reading and writing the values of the flag bits of the emulation flag register. The operating component further comprises an operating controller for performing an operation control according to the values of the flag bits of the emulation flag register when the RISC processor is in the working mode of X86 virtual machine during an operation process.
CAS Institute of Computing Technology | Date: 2010-09-08
An RISC processor device and a method of emulating a floating-point stack operation thereof. The processor device comprises: a floating-point register file containing a plurality of floating-point registers; a decoding section for decoding operation instructions of the RISC processor; a floating-point operation section connected to the decoding section; a control register for controlling the status of the floating-point registers and controlling the decoding section and the floating-point operation section to emulate a floating-point register stack using the floating-point register file. The decoding section includes a pointer register for maintaining a stack operation pointer and storing the value of the stack operation pointer; the floating-point operation section includes a pointer operation module for operating the pointer register, emulating the stack operation of the stack pointer of the pointer register, modifying and monitoring the phase of the stack pointer during emulating a floating-point register stack operation.