Broadway, United States
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NEW YORK, NY--(Marketwired - November 02, 2016) - Broadway Technology is pleased to announce that its unique and progressive corporate culture was recognized as a winner of SmartCEO Magazine's Corporate Culture Award Program. The Corporate Culture Awards celebrate 50 companies in Greater New York that have successfully championed a positive, productive and performance-driven culture, and have worked with their employees to develop successful cultural practices. Winners will be profiled in the November/December issue of SmartCEO magazine and celebrated at an awards ceremony on Wednesday, Nov. 30, 2016 at 404 NYC. "The 2016 Corporate Culture Award winners have realized that running a company is more than head count and the bottom line. It's about creating a place where creativity, energy and ideas are cultivated. Through this they are able to not only enhance performance and sustain their companies' competitive advantages but also enrich the lives of those they employ and inspire them to make a greater impact on the world," says Jaime Nespor-Zawmon, President of SmartCEO. "We're honored to celebrate with the leaders of New York's top company cultures and recognize them for building true performance-driven cultures." "Broadway Technology is honored to receive this award for our unique corporate culture and philosophy which empowers employees to have a significant positive impact. Our people are not only the best in their fields, but they will go out of their way to help someone else learn and succeed. This spirit of enabling shared success runs throughout the organization and is based on a belief that we are a stronger organization when we all work together," said Broadway Technology Head of Talent and Culture, Mary Loeffler. The Corporate Culture Awards program honors companies that foster a creative, collaborative workplace culture to enhance performance and sustain a competitive advantage. Smart leaders understand that culture is a company's greatest asset, driving performance and growth. What's more, a successful culture is actively and intentionally cultivated and developed. Corporate Culture Awards winners will have championed for a positive, productive culture in their organization, and will have worked with employees to develop successful cultural practices. The final roster of winners will be chosen by an independent committee of local business leaders, profiled in SmartCEO magazine, and celebrated at a high-energy awards event. SmartCEO's mission is to educate and inspire the business community through its award-winning magazine, connections at C-level events and access to valuable online resources. SmartCEO's integrated media platforms reach decision makers in the Baltimore, Boston, Charlotte, Long Island, New Jersey, New York, Philadelphia and Washington, DC, metropolitan areas. Broadway Technology is a leader in high-performance financial solutions for top-tier global, regional, and national banks and brokers, and the buy-side. Founded in 2003 by experts in enterprise software and quantitative trading, Broadway has employees worldwide with offices in New York, Austin, and London. To learn more about Broadway, visit us at: www.broadwaytechnology.com, or contact us at: info@broadwaytechnology.com / tel: 646.912.6450.


NEW YORK, NY--(Marketwired - November 16, 2016) - Broadway Technology today announced it ranked 410 on Deloitte's Technology Fast 500™, a ranking of the 500 fastest growing technology, media, telecommunications, life sciences and energy tech companies in North America. Broadway Technology grew 159% during this period. "We are proud to be named to Deloitte's Technology Fast 500™," said Tyler Moeller, CEO of Broadway Technology. "This acknowledgement by Deloitte is an affirmation that Broadway's long term commitment to customer success, hiring exceptional people, and building great software is paying off." "Today, when every organization can be a tech company, the most effective businesses not only foster the courage to explore change, but also encourage creativity in using and applying existing assets in new ways, as resourcefully as possible," said Sandra Shirai, principal, Deloitte Consulting LLP and U.S. technology, media and telecommunications industry leader. "This ingenious approach to innovation calls for the encouragement of curiosity and collaboration both within and outside the office walls." "This year's Fast 500 winners showcase that when organizations are open to diverse perspectives and insights, they are able to create an environment for their employees and customers to see the possibilities and ingenious solutions that might lie ahead," added Jim Atwell, national managing partner of the emerging growth company practice, Deloitte & Touche LLP. "Entrepreneurial environments foster change and innovation within businesses, and we look forward to watching these companies continue to drive change across all sectors." About Deloitte's 2016 Technology Fast 500™ Deloitte's Technology Fast 500 provides a ranking of the fastest growing technology, media, telecommunications, life sciences and energy tech companies -- both public and private -- in North America. Technology Fast 500 award winners are selected based on percentage fiscal year revenue growth from 2012 to 2015. In order to be eligible for Technology Fast 500 recognition, companies must own proprietary intellectual property or technology that is sold to customers in products that contribute to a majority of the company's operating revenues. Companies must have base-year operating revenues of at least $50,000 USD, and current-year operating revenues of at least $5 million USD. Additionally, companies must be in business for a minimum of four years and be headquartered within North America. As used in this document, "Deloitte" means Deloitte LLP and its subsidiaries. Please see www.deloitte.com/us/about for a detailed description of the legal structure of Deloitte LLP and its subsidiaries. Certain services may not be available to attest clients under the rules and regulations of public accounting. About Broadway Technology Broadway Technology is a leading provider of high-performance fintech solutions and technology infrastructure to top-tier global, regional, and national banks and brokers, and the buy-side. Founded in 2003 by experts in enterprise software and quantitative trading, Broadway has employees worldwide with offices in New York, Austin, and London. To learn more about Broadway, visit us at: www.broadwaytechnology.com, or contact us at: info@broadwaytechnology.com / tel: 646.912.6450.


Papa D.,Broadway Technology | Viswanathan N.,IBM | Sze C.,IBM | Li Z.,IBM | And 3 more authors.
IEEE Micro | Year: 2011

In traditional physical-synthesis methodologies, the placement of flip-flops and latches is problematic, especially for large systems on chips. A next-generation electronic-design-automation methodology improves timing closure through clock-network synthesis and placement of flip-flops and latches to avoid timing disruptions or immediately recover from them. When evaluated on large CPU designs, the methodology saw double-digit improvements in timing, wirelength, and area versus current technology. © 2006 IEEE.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

Modern physical synthesis flows operate on very large designs and perform increasingly aggressive timing optimizations. Traditional incremental timing analysis now represents the single greatest bottleneck in such optimizations and is lacking in features necessary to support them efficiently. We describe a paradigm of transactional timing analysis, which, in addition to incremental updates, offers an efficient, nested undo functionality that does not require significant timing calculations. This paradigm extends traditional incremental Static timing analysis (STA) and enables necessary infrastructure for multiple physical synthesis optimizations in this book. © 2013 Springer Science+Business Media New York.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

Physical synthesis is a multi-phase optimization process performed during IC design to achieve timing closure, though area, routability, power and yield must be optimized as well. Individual steps in physical synthesis, called transformations are invoked by dynamic controller functions in complex sequences called design flows (EDA flows). Transformations rely on abstract delay models to analyze timing requirements and guide optimization, as illustrated in Sect. 2.3. Finally, we describe recent evolution of requirements for physical synthesis and discuss current trends. © 2013 Springer Science+Business Media New York.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

Sophisticated integrated circuits (ICs) can be classified as processors (CPUs), application-specific integrated circuits (ASICs) or systems-on-a-chip (SoCs), which embed CPUs and intellectual property blocks into ASICs. Mass-produced on silicon chips, these circuits fuel consumer and industrial electronics, maintain national and international computer networks, coordinate transportation and power grids, and ensure the competitiveness of military systems. The design of new integrated circuits requires sophisticated optimization algorithms, software and methodologiescollectively called Electronic Design Automation (EDA)which leverage synergies between Computer Science, Computer Engineering and Electrical Engineering. © 2013 Springer Science+Business Media New York.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

In a complete physical synthesis flow, many optimizations are applied to critical paths that are already optimized by a series of powerful transformations, as described in Chap. 2. Transforms that can further improve the timing of such paths are invaluable for timing closure. Finding such transformations and applying them efficiently is challenging. © 2013 Springer Science+Business Media New York.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

Optimizations developed in earlier chapters affect many aspects of physical synthesis, but often target sequential elements, which particularly impact circuit performance. In order to obtain synergies between these optimizations, we explore the infrastructure for physical synthesis used by IBM for large commercial microprocessor designs. We focus our attention on a very challenging high-performance design style called large-block synthesis (LBS). In such designs latch placement is critical to the performance of the clock network, which in turn affects chip timing and power. Our research uncovers deficiencies in the state-of-the-art physical synthesis flow vis-à-vis latch placement that result in timing disruptions and hamper design closure. We introduce a next-generation EDA methodology that improves timing closure through careful latch placement and clock-network routing to (i) avoid timing degradation where possible, and (ii) immediately recover from unavoidable timing disruptions. When evaluated on large CPU designs recently developed at IBM, our methodology leads to double-digit improvements in key circuit parameters, compared to IBMs prior state-of-the-art methodologies. © 2013 Springer Science+Business Media New York.


Papa D.A.,Broadway Technology | Markov I.L.,University of Michigan
Lecture Notes in Electrical Engineering | Year: 2013

A physical synthesis flow reads a mapped netlist produced by logic synthesis, then computes physical locations for gates and improves the performance of the circuit, until timing constraints are met. We observe that state-of-the-art flows consist of a series of optimizations that operate at two distinct scales, near-linear time algorithms that apply to the whole netlist, and more expensive transformations that typically operate on a handful of gates or interconnections. Such a limited view of the solution space of circuit optimization leaves many transformations vulnerable to becoming trapped in local minima. We observe this phenomenon on large, high-performance designs and improve upon the state of the art by integrating optimizations that are traditionally applied separately. Our novel transformations achieve broad opportunities for increased circuit performance and can handle larger design subsections than existing physical-synthesis transformations, thereby extending the scope of optimization. Given that the placement of sequential elements is a critical factor to the success of timing closure, we develop a next-generation timing-closure flow that improves the placement of sequential elements and facilitates the synthesis of high-performance clock networks. © 2013 Springer Science+Business Media New York.


Biggs M.,Broadway Technology
SPLASH Companion 2015 - Companion Proceedings of the 2015 ACM SIGPLAN International Conference on Systems, Programming, Languages and Applications: Software for Humanity | Year: 2015

This paper introduces "statik", a C++ software library for automatically generating fully-incremental compilers. Given a grammar for any phase of a compilation process (e.g. lexer, parser, code-generator), the library provides a top-down chart parser that accepts incremental changes to a linked-list of input for that compilation phase, and emits the corresponding changes as a linked-list of output. The output of one phase can be chained as input to another, so that a whole compiler can be constructed as a pipeline of an arbitrary number of compilation phases. This can be used as an incremental mapping between character-by-character edits anywhere in an input source file through to the resulting changes in the compiled object code, with minimal recom-putation of intermediary state. Statik is released as Free software, and is available under the GPLv3+ license at http://statik.rocks.

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