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Kumaresan G.,Anna University | Vigneswaran V.S.,Anna University | Esakkimuthu S.,Bhaktavatsalam Polytechnic College | Velraj R.,Anna University
Journal of Energy Storage | Year: 2016

The performance evaluation of a newly developed double walled cooking unit (tava type) suitable for an indirect type solar cooking application integrated with thermal energy storage system is presented. The experimental set-up consists of a cooking unit, a storage tank and a positive displacement pump. Therminol 55 and D-Mannitol are used as the heat transfer fluid (HTF) and storage medium respectively. During the cooking experiment the maximum temperature reached by the olive oil in the cooking unit was 152 °C within a duration of 15 min which is comparatively lesser than the time taken by a conventional LPG stove in simmering mode. A heat balance for the developed cooking unit was prepared to account for the heat input and the distribution pattern. An experiment was also conducted to evaluate the average heat loss encountered in the system under no load condition and it was found that there was considerable heat loss in the flow circuit during the discharging process. The results of the present study will be very useful for the design of solar based indoor cooking units. © 2016 Elsevier Ltd.

Kandasamy R.,Bhaktavatsalam Polytechnic College | Murugesan R.,Anna University
ARPN Journal of Engineering and Applied Sciences | Year: 2011

Fiber Reinforced Concrete (FRC) is a composite material consisting of cement based matrix with an ordered or random distribution of fiber which can be steel, nylon, polythene etc. The addition of steel fibre increases the properties of concrete, viz., flexural strength, impact strength and shrinkage properties to name a few. A number of papers have already been published on the use of steel fibres in concrete and a considerable amount of research has been directed towards studying the various properties of concrete as well as reinforced concrete due to the addition of steel fibres. Hence, an attempt has been made in the present investigations to study the influence of addition of polythene fibers (domestic waste plastics) at a dosage of 0.5% by weight of cement. The properties studied include compressive strength and flexural strength. The studies were conducted on a M20 mix and tests have been carried out as per recommended procedures of relevant codes. The results are compared and conclusions are made. © 2006-2011 Asian Research Publishing Network (ARPN).

Selvaraj G.,Bhaktavatsalam Polytechnic College | Kashwan K.R.,Anna University
International Journal of Applied Engineering Research | Year: 2015

Network on Chip (NoC) router plays a vital role in System on Chip (SoC) applications. Routing operation is difficult to perform inside the SoC chip. Because it contains millions of chips in one single Integrated Circuit (IC), in which every chip consists of millions of transistors. Hence NoC router is designed to enable efficient routing operation in the SoC board. It produces more delay to find the priority, which comes from various input channels. And more area is consumed in unidirectional router. Also if any path failure occurs, it cannot route the data through other output channel. To address this problem, a novel bidirectional NoC router with and without contention is proposed, which offers less area and high speed than the existing unidirectional router. The proposed bidirectional router can route the data from any input channel to each and every output channel. So it avoids conflict situation and path failure problems. If any path fails, immediately it will take the alternative path through the switch allocator. Simulation is performed by ModelSim6.3c and synthesis is carried out by Xilinx10.1. The proposed bidirectional NoC router is implemented in FPGA Spartan3 to verify their performance. Our results prove that the proposed bidirectional router is suitable for high frequency operation, minimum delay and small in size on-chip network design. © Research India Publications.

Kandasamy R.,Bhaktavatsalam Polytechnic College | Murugesan R.,Anna University
Journal of Engineering and Applied Sciences | Year: 2012

Fiber Reinforced Self Compacting Concrete (FRSCC) is a composite material consisting of cement based matrix with an ordered or random distribution of fiber which can be steel, nylon and polythene, etc., which offers several economical and technical benefits. In this study, domestic waste plastics (Polythene fibres) were used and the properties of concrete (viz., compressive strength, flexural strength, split tensile strength) are studied. The tests have been carried out as per EFNARC for fresh concrete and Indian Standard Code for hardened concrete. © Medwell lournals, 2012.

Kashwan K.R.,Anna University | Selvaraj G.,Bhaktavatsalam Polytechnic College
2014 International Conference for Convergence of Technology, I2CT 2014 | Year: 2014

Technology scaling has led to the integration of many cores into a single chip. Multiprocessor Network-on-Chip (NoC) seems to be a good solution for the higher performance desired VLSI designs. The main challenge is how to enhance the communication efficiency in NoC. The NoC is a new paradigm which is fast emerging at present. The performance of the on-chip-networking depends on routing techniques used in the system. The existing techniques such as Round Robin Arbitration are not so efficient in finding an optimal path. The authors have chosen a different routing algorithm called Optimal Address Based Router (OAR) to find an optimal path which has low overhead. In this paper, we have reported a comparative evaluation of Optimal Address Based NoC router and Round Robin Arbitration based NoC router. The simulated results indicate that the Optimal Address Based NoC router is a better choice. The implementation is done on FPGA Spartan 3Xc 3s400 board. Further analyses of results shows that the optimal address based router consumes 71% lower power, occupies 90% less area and is faster by a factor of 35%. © 2014 IEEE.

Selvaraj G.,Bhaktavatsalam Polytechnic College | Kashwan K.R.,Anna University
Research Journal of Applied Sciences, Engineering and Technology | Year: 2014

This study is a comprehensive report on performance analyses of Round Robin and matrix arbitrations to enhance the reliability of on-chip networks. Arbiter is used in Network-on-Chip (NoC) router when number of input ports requested is the same as output ports. If many inputs are requested for same output port, the matrix arbiter deals it by forming a 5×5 matrix based on input and output ports. Next, it allots the priority to the requested input ports and simultaneously generates a control signal for selecting the input port to send the packet to output port. The Robin arbiter generates the grant signal on the basis of priority allotted to the input ports. The simulation results of arbitration analysis shows that the router design of front end model consumes less power by 8% and occupies smaller area by 3% on chip. The area on chip is around 64% of available area using Round Robin arbitration compare to that of matrix arbitration. This study also implements hamming distance in order to check the error free data transmission of the NoC router. © Maxwell Scientific Organization, 2014.

Kandasamy R.,Bhaktavatsalam Polytechnic College | Murugesan R.,Anna University
Journal of Structural Engineering (India) | Year: 2014

Manufactured sand/ Crushed stone sand is defined in IS 383 as "Fine aggregate produced by crushing hard stone". This means that it is a controlled crusher dust which does not have more than 20% passing 150 micron sieve and not more than 15% passing 75 micron sieve. Normally, the crusher dust is thrown away as a waste material and river sand is used in concrete at a price. By using the crusher dust as crushed stone sand/ manufactured sand, one can avoid buying river sand for concrete and pay for only transporting the crushed stone sand like the coarse aggregates. Hence, it is prudent to conserve natural river sand for other utilities than for concrete. The domestic plastics waste is causing a lot of harm to environment and hence their disposal has become a prime concern. The use of plastic wastes in concrete has not been well documented. Hence, investigations were carried out on fibre reinforced concrete with manufactured sand as fine aggregate and domestic waste plastics as fibres. A detailed investigation has been carried out on three types of concrete namely, ordinary concrete with river sand, concrete using manufactured sand as complete replacement for sand and fibre reinforced concrete with manufactured sand and domestic waste plastics as fibres. The mechanical characteristics, viz., compressive strength, split tensile strength and flexural strength were evaluated.

Esakkimuthu S.,Bhaktavatsalam Polytechnic College | Hassabou A.H.,TU Hamburg - Harburg | Spinnler M.,TU Hamburg - Harburg | Blumenberg J.,TU Hamburg - Harburg | Velraj R.,Anna University
Solar Energy | Year: 2013

Many types of solar air heaters have been developed in India and their performance has been studied in detail. In solar dryers the drying process largely depends on the varying local weather conditions, resulting in a poor quality of the dried product. To eliminate the fluctuations in the temperature of the hot air, solar collectors are integrated with the Phase Change Material (PCM) based thermal storage unit. The present study is aimed at investigating the feasibility of using a latent heat storage unit with HS 58, an inorganic salt based phase change material, to store the excess solar energy, and release it when the energy availability is inadequate during poor weather conditions, and to extend the period of utilisation beyond the sunshine hours. Experiments were conducted to evaluate the charging and discharging characteristics of the storage unit. The effects of inlet flow rate during the charging and discharging processes were measured and reported. For the storage tank configuration and PCM ball size considered in the present investigation, the mass flow rate of 200. kg/h is able to provide a near uniform rate of heat transfer during charging and discharging processes. Further, low mass flow rate is able to utilise the maximum capacity of the storage system and to supply heat for a longer duration. © 2012 Elsevier Ltd.

Selvaraj G.,Bhaktavatsalam Polytechnic College | Kashwan K.R.,Salem College
International Journal of Applied Engineering Research | Year: 2015

In VLSI design, routing is one of the most important research areas for Network on Chip (NOC). Network Congestion is one of the very big issues in System on chip. To address the congestion problem, design Robust Reconfigurable Routing algorithm R3, is a new Nano scale protocol for future CMOL FPGA circuits. This Architecture based on hybrid circuits which combine CMOS, Nano wire and Molecular scale devices. The basic Modules of R3 are implemented using CMOL FPGA architecture. The principle of computation the architecture based on Runtime Reconfiguration computing. This reconfigurable computing enhances the speeds up to 500 times and energy saving 70% compared to a conventional CMOS approach. This R3Algorrithm address the network traffic between the chips. CMOL FPGA design focused to minimize of chip area and power consumption. © Research India Publications.

George S.,Bhaktavatsalam Polytechnic College
Proceedings of the IASTED International Conference on Engineering and Applied Science, EAS 2012 | Year: 2012

Present day technology for ASICs supports Networks-on-Chip designs which can have 100 million gates on a single chip. The latest FPGAs can support only about 10 million gates to accommodate all logic and the associated routings. In order to implement competitive Networks on Chip (NoC) architecture in FPGA's, the occupancy by the networks should be kept minimum. This ensures that the maximum area can be utilized by the logic while maintaining the performance of router networks. Reducing the area also reduces the power consumption. In this paper we report an implementation of a parallel router which can support five simultaneous routing requests. We introduce optimizations in XY routing and decoding logic thereby gaining in area and performance. The header overhead is 8 bits per packet and the packet size can vary between 16 and 128 bits.

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